Filtered Pwm Recommended Clock Settings - Delta PBC Series User Manual

Power brick controller
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Power Brick Controller User Manual

Filtered PWM Recommended Clock Settings

In this mode, the ±10 VDC analog output is obtained by passing the digital PWM signal through a low pass
filter. This technique, although not as performing as a true digital to analog converter, is more than adequate
for most servo applications.
Note
The duty cycle of the PWM signal controls the magnitude of the voltage output. This is handled internally
by the PMAC, the user needs not to change any settings.
However, the frequency of the PWM signal determines the output resolution and ripple magnitude
(disturbance). The trade-off is as follows:
PWM Frequency
The higher the PWM frequency, the lower is the resolution with a low-ripple signal output.
The lower the PWM frequency, the higher is the resolution with a high-ripple signal output.
Using Filtered PWM is fundamentally the same as using the True DAC option, except that the PWM
frequency must be set to 30KHz.
// FILTERED PWM RECOMMENDED CLOCK SETTINGS, 30 KHz PWM
Sys.WpKey = $AAAAAAAA
PowerBrick[1].PhaseFreq =
PowerBrick[1].ServoClockDiv =
PowerBrick[0].PhaseFreq =
PowerBrick[0].ServoClockDiv =
Sys.RtIntPeriod =
0
Sys.ServoPeriod =
1000
Sys.PhaseOverServoPeriod =
PowerBrick[0].Chan[0].PwmFreqMult =
PowerBrick[0].Chan[1].PwmFreqMult =
PowerBrick[0].Chan[2].PwmFreqMult =
PowerBrick[0].Chan[3].PwmFreqMult =
PowerBrick[1].Chan[0].PwmFreqMult =
PowerBrick[1].Chan[1].PwmFreqMult =
PowerBrick[1].Chan[2].PwmFreqMult =
PowerBrick[1].Chan[3].PwmFreqMult =
Manual Motor Setup
Some amplifiers operate in the ±5 VDC range; this can be regulated
using
the
motor
Motor[x].MaxDac.
Resolution
10000
1
10000
1
* (PowerBrick[0].ServoClockDiv + 1) / PowerBrick[0].PhaseFreq;
1
/ (PowerBrick[0].ServoClockDiv + 1);
5
5
5
5
5
5
5
5
command
output
Ripple
limit,
parameter
165

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