Solid State Logic BiG SiX User Manual page 2

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No part of this publication may be reproduced in any form or by any means, whether mechanical or electronic,without the written

As research and development is a continual process, Solid State Logic reserves the right to change the features and

Solid State Logic cannot be held responsible for any loss or damage arising directly or indirectly from any error or omission in

PLEASE READ ALL INSTRUCTIONS, PAY SPECIAL HEED TO SAFETY WARNINGS.

Revision 1.3, January 2022 - Further updated 'Sum to Mix Bus' details and updated Block Diagram

SSL

and Solid State Logic

BiG SiX™, SiX™ and SuperAnalogue™ are trademarks of Solid State Logic.

permission of Solid State Logic, Oxford, OX5 1RU, England.

specifications described herein without notice or obligation.

Revision V1.0, September 2021 - Initial Release

Revision V1.1, November 2021 - Updated 'Sum to Mix Bus' details

Revision V1.2, November 2021 - Updated compressor details

Revision 1.4, February 2022 - Correction to DC Power inlet details

Revision 1.5, March 2022 - Correction of Stereo Channel USB Output Connection

Initial release Japanese version February 2022

Revision V1.5, Japanese version May 2022

実際の製品構成は写真のものと若干異なる場合があります。

また性能の向上のため仕様を予告なしに変更する場合がありますのでご了承下さい。

日本語版

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www.solidstatelogic.com

are ® registered trademarks of Solid State Logic.

this manual.

E&OE

March 2022

Revision History

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www.solid-state-logic.co.jp

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