Silicon Laboratories C8051F58 Series User Manual page 15

8.12. Potentiometer (J20)
The C8051F580 (Side A) device has the option to connect port pin P1.2 to a 10K linear potentiometer. The
potentiometer is connected through the J20 header. The potentiometer can be used for testing the analog-to-digital
(ADC) converter of the MCU.
8.13. Power Supply I/O (Side A) (TB3)
All of the C8051F580 target device's supply pins are connected to the TB3 terminal block. Refer to Table 10 for the
TB3 terminal block connections.
8.14. Alternate Power Supply Headers (J18, J21)
The C8051F580 Target Board includes two headers that allow for alternate power sources and power
measurement. Header J18 connects the VIO voltage supplied to the Side A MCU to other peripherals on the board,
such as the P1.4_SW push-button switch pull-up, and the R27 potentiometer source. To enable current
measurement, the shorting block on J18 can be removed so that the VIO_A node only powers the VIO pin on the
MCU. Another voltage source will need to be applied to the VIO_SRC node to power the other peripherals.
Header J21 connects the P4 power-adapter supply to the V_HIGH node, which is used as the power source for the
LIN transceivers (T1, T2). The shorting block on header J21 can be removed to force the LIN transceivers to use
the voltage supply externally supplied on the +LIN_V pin on the TB1 header.
8.15. C2 Pin Sharing
On the C8051F580 (Side A), the debug pin C2CK is shared with the /RST pin. On the C8051F582 (Side B), the
debug pins C2CK and C2D are shared with the pins /RST and P3.0 respectively. The target board includes the
resistors necessary to enable pin sharing which allow the pin–shared pins (/RST and P3.0) to be used normally
while simultaneously debugging the device. See Application Note "AN124: Pin Sharing Techniques for the C2
Interface" at www.silabs.com
Table 10. TB3 Terminal Block Pin Descriptions
Pin #
1
2
3
4
5
6
for more information regarding pin sharing.
Rev. 0.1
Description
VIO_A
VREGIN_A
VDD_A
VDDA_A
GNDA_A
GND
C8051F580DK
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