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PCF8574APWR (DIGITAL : IC103)
Terminal Function
PIN
NAME
RGY
DGV or PW
DW or N
A[0..2]
6, 7, 9
6, 7, 9
1, 2, 3
GND
15
15
8
INT
1
1
13
NC
3, 8, 13, 18
3, 8, 13, 18
-
4, 5, 6, 7,
10, 11, 12, 14,
10, 11, 12, 14,
P[0..7]
9, 10, 11,
16, 17, 19, 20
16, 17, 19, 20
12
SCL
2
2
14
SDA
4
4
15
V
5
5
16
CC
I/O Expander (IC103), Open Drain
Addr.
ND8006 Function
Port Name
Hardware PD/PU
Port
name
0x39 U1003, P0 C_USBB_MCK_SEL PU (P3V3_UCOM) 10kohms
0x39 U1003, P1 C_CS2K_MCK_SEL PU (P3V3_UCOM) 10kohms
0x39 U1003, P2 C_CS2K_LRCK_SEL PU (P3V3_UCOM) 10kohms
C_TDM_CONV_
0x39 U1003, P3
PU (P3V3_UCOM) 10kohms
RESET
0x39 U1003, P4 C_DIR_MCK_SEL
PU (P3V3_UCOM) 10kohms
C_PCM_DSD_
0x39 U1003, P5
PU (P3V3_UCOM) 10kohms
MODE
C_PLD_DAC1_
0x39 U1003, P6
PU (P3V3_UCOM) 10kohms
MUTE
C_DSD_PHASE_
0x39 U1003, P7
PU (P3V3_UCOM) 10kohms
MODE
Pin Functions
TYPE
DESCRIPTION
Address inputs 0 through 2. Connect directly to V
or ground. Pullup
I
CC
resistors are not needed.
—
Ground
O
Interrupt output. Connect to V
through a pullup resistor.
CC
—
Do not connect
I/O
P-port input/output. Push-pull design structure.
I
Serial clock line. Connect to V
through a pullup resistor
CC
I/O
Serial data line. Connect to V
through a pullup resistor.
CC
—
Voltage supply
Nor-
Net-
I/O
Detail of Function
mal
work
STBY.
STBY.
O
O/L O/L To CPLD, USBB MCK 24MHz(H) or 22MHz(L) Select
To CPLD, CS2000-CP MCK 24MHz(H) or 22MHz(L)
O
O/L O/L
Select
O
O/L O/L To CPLD, CS2000-CP LRCK Control
To CPLD, TDM2PCM/DSD Converter Reset(L) or Un-
O
O/L O/L
Reset(H) Control
To CPLD, PCM9211 ADC MCK 24MHz(H) or 22MHz(L)
O
O/L O/L
Select
O
O/L O/L To CPLD, Main Selector PCM(H) or DSD(L) Select
To CPLD, ES9016K2M Digital Mute(L) or Un-Mute(H)
O
O/L O/L
Select
To CPLD, ES9016K2M DSD Data Phase Mode(H) or
O
O/L O/L
Normal Mode(L) Select
NCP380 (DIGITAL : IC119)
OUT
1
6
IN
ILIM*
PAD1
2
5
GND
FLAG
3
4
EN
UDFN6
(Top view)
*For adjustable version only, otherwise not connected.
Terminal Function
PIN FUNCTION DESCRIPTION
Pin Name
Type
EN
INPUT
Enable input, logic low/high (i.e. EN or EN) turns on power switch
GND
POWER
Ground connection;
IN
POWER
Power−switch input voltage; connect a 1 mF or greater ceramic capacitor from IN to GND as close as
possible to the IC.
FLAG
OUTPUT
Active−low open−drain output, asserted during overcurrent, overtemperature or reverse−voltage
conditions. Connect a 10 kW or greater resistor pull−up, otherwise leave unconnected.
OUT
OUTPUT
Power−switch output; connect a 1 mF ceramic capacitor from OUT to GND as close as possible to the IC
is recommended. A 1 mF or greater ceramic capacitor from OUT to GND must be connected if the USB
requirement (i.e.120 mF capacitor minimum) is not met.
ILIM*
INPUT
External resistor used to set current−limit threshold; recommended 5 kW < R
PAD1**
THERMAL
Exposed Thermal Pad: Must be soldered to PCB Ground plane
*(For adjustable version only, otherwise not connected.
**For DFN version only.
Block Diagram
IN
Current
ILIM*
Limiter
Vref
TSD
GND
EN
EN block
*For adjustable version only, otherwise not connected.
27
*For adjustable version only.
Figure 1. Typical Application Circuit
OUT
IN
1
5
OUT
1
6
IN
GND
2
ILIM*
PAD1
2
5
GND
3
4
FLAG
EN
TSOP−5
FLAG
4
EN
3
Figure 2. Pin Connections
UDFN6
(Top view)
Description
*For adjustable version only, otherwise not connected.
PIN FUNCTION DESCRIPTION
Pin Name
Type
EN
INPUT
Enable input, logic low/high (i.e. EN or EN) turns on pow
GND
POWER
Ground connection;
NCP380
IN
POWER
Power−switch input voltage; connect a 1 mF or greater c
possible to the IC.
BLOCK DIAGRAM
FLAG
OUTPUT
Active−low open−drain output, asserted during overcurr
conditions. Connect a 10 kW or greater resistor pull−up
OUT
OUTPUT
Power−switch output; connect a 1 mF ceramic capacitor
Blocking control
is recommended. A 1 mF or greater ceramic capacitor fr
requirement (i.e.120 mF capacitor minimum) is not met.
ILIM*
INPUT
External resistor used to set current−limit threshold; rec
PAD1**
THERMAL
Exposed Thermal Pad: Must be soldered to PCB Groun
*(For adjustable version only, otherwise not connected.
**For DFN version only.
Gate Driver
http://onsemi.com
2
UVLO
Osc
Control logic
and timer
Figure 5. Block Diagram
Figure 1. Typical Application Circ
IN
1
6
OUT
OUT
IN
1
5
ILIM*
GND
2
5
GND
2
FLAG
EN
3
4
3
4
TSOP−6
FLAG
EN
TSOP−5
Figure 2. Pin Connections
Descript
< 250 kW.
ILIM
OUT
Flag
/FLAG
http://onsemi.com
2
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