Power Header Schematic - Texas Instruments ADS8028EVM-PDK User Manual

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3.3 Power Supply
The ADS8028EVM requires two power-supply rails: one 5-V analog supply (AVDD) and a configurable
digital interface (BVDD). Three selectable voltages are available for the digital interface to make the EVM
compatible with different logic levels. Jumpers J-1, J-3, and J-5 on the ADS8028EVM select 1.8-V, 3.3-V,
or 5-V BVDD digital interface voltages, respectively. Refer to
functions and default settings. The default jumper settings of J-1 (open), J-3 (short), and J-5 (open) are
recommended when using the ADS8028EVM with the MMB0 3.3-V logic.
Power rails are supplied to the ADS8028EVM through the J-POWER header. If the ADS8028EVM is being
evaluated as a stand-alone board, the user must supply power to the J-POWER header by direct
connections to a power supply. Otherwise, the MMB0 motherboard supplies the ADS8028EVM with power
through J-5 when the ADS8028EVM daughtercard is mounted on the MMB0. Check the MMB0 jumper
settings listed in the
when connected to the MMB0 motherboard.
connections on the ADS8028EVM.
Do not apply voltages that the exceed the absolute maximum ratings of the
installed components. The absolute maximum supply voltage of the OPA836
limits the maximum analog supply voltage of the ADS8028EVM to 5.5 V. The
digital supply voltage should not exceed the analog supply voltage.
SBAU198 – April 2012
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ADS8028EVM-PDK Kit Operation
Figure 6
Figure 6. Power Header Schematic
Copyright © 2012, Texas Instruments Incorporated
Table 3 for the ADS8028EVM jumper
section if the ADS8028EVM is not receiving power
shows a schematic of J-POWER header
CAUTION
ADS8028EVM Hardware Details
ADS8028EVM-PDK
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