HP Vectra VE4 Reference Manual page 18

Real-time clock
UARTs
IEEE 1284 parallel
port
IDE control logic
Programmable Chip
Selects
Address decoder
General
Vectra 4E/xx Technical Reference
DS1287, MC146818 and PC87911 compatible
242-byte battery backed-up CMOS RAM in two banks
Selective lock mechanism locks any half of RTC RAM
Calendar in days, days of week, months, years with
automatic leap-year adjustment
Time of Day in seconds, minutes, hours
12 or 24 hour format
Optional daylight saving adjustment
BCD or binary format for time keeping
Three individually maskable interrupt event flags
Periodic rates from 122 µs to 500 ms
Time of day alarm once per second to once per day
Separate battery pin, 2.4V operation
2 µA power consumption
Double-buffer time registers
Software compatible with PC16550A and NS16450
EPPP IEEE1284, Extended Capabilities Ports ECP 1.7
(DMA1) and ECP 1.9 (DMA3)
Provides a complete IDE interface with DMA control,
including Type F DMA (except for optional buffers)
2 pins for 2 separate programmable chip select decoders can
be programmed for game port control
Provides selection of all primary and secondary ISA
addresses including COM 1-4
Low power CMOS technology
Ability to shut off all clocks to all modules
PC87303VUL is drop-in replacement for PC87323VUL
Reduced pin leakage current
Special configuration register for power-down
Disable bit for RTC
160-pin PQFP package
1 System Overview 18