Table Of Contents - Espressif Systems ESP32-C3FH4 Hardware Design Manuallines

Contents
Contents
1 Overview
2 Schematic Checklist
2.1 Power Supply
2.1.1 Digital Power Supply
2.1.2 Analog Power Supply
2.2 Power-on Sequence and System Reset
2.2.1 Power-on Sequence
2.2.2 Reset
2.3 Flash
2.4 Clock Source
2.4.1 External Clock Source (compulsory)
2.4.2 RTC Clock (optional)
2.5 RF
2.6 UART
2.7 ADC
2.8 Strapping Pins
2.9 GPIO
3 PCB Layout Design
3.1 General Principles of PCB Layout
3.2 Placement of Module on the Base Board
3.3 Power Supply
3.4 Crystal
3.5 RF
3.6 Flash
3.7 UART
3.8 Typical Layout Problems and Solutions
3.8.1 Ripple in the power supply is not large, but the RF transmit (TX) performance is rather poor.
3.8.2 Ripple in power supply is small during packet transmission, but RF TX performance is still poor.
3.8.3 When ESP32-C3 family transmits data packets, the measured power is much higher or lower
than the target power, and the EVM is relatively poor.
3.8.4 TX performance is not bad, but the RX sensitivity is low.
4 Hardware Development
4.1 Modules Built around ESP32-C3 Family of Chips
4.2 Development Boards Built around ESP32-C3 Family of Chips
Revision History
Solutions, Documentation and Legal Information
Espressif Systems 2
Submit Documentation Feedback
ESP32-C3 Family Hardware Design Guidelines V1.0
4
5
6
6
6
7
7
8
8
9
9
10
11
11
11
11
13
16
16
16
19
20
21
23
23
24
24
24
24
24
26
26
26
27
28