2 Schematic Checklist
CHIP_EN
Strapping pin
Table 3: Parameter Descriptions of Setup and Hold Times for the Strapping Pin
Parameter
t
0
t
1
2.9 GPIO
Note:
The content below is excerpted from Section General Purpose Input / Output Interface (GPIO) in
ESP32-C3 family has 22 GPIO pins which can be assigned various functions by configuring corresponding
registers. Besides digital signals, some GPIOs can be also used for analog functions, such as ADC.
All GPIOs have selectable internal pull-up or pull-down, or can be set to high impedance. When these GPIOs are
configured as an input, the input value can be read by software through the register. Input GPIOs can also be set
to generate edge-triggered or level-triggered CPU interrupts. All digital IO pins are bi-directional, non-inverting
and tristate, including input and output buffers with tristate control. These pins can be multiplexed with other
functions, such as the UART, SPI, etc. For low-power operations, the GPIOs can be set to holding state.
The IO MUX and the GPIO matrix are used to route signals from peripherals to GPIO pins. Together they provide
highly configurable I/O. Using GPIO Matrix, peripheral input signals can be configured from any IO pins while
peripheral output signals can be configured to any IO pins. Table
more information about IO MUX and GPIO matrix, please refer to Chapter IO MUX and GPIO Matrix (GPIO,
IO_MUX) in
ESP32-C3 Technical Reference
Name
XTAL_32K_P
Espressif Systems
t 0
V
IL_nRST
V
IH
Figure 10: Setup and Hold Times for the Strapping Pin
Description
Setup time before CHIP_EN goes from low to high
Hold time after CHIP_EN goes high
Manual.
Table 4: IO MUX Pin Functions
No.
Function 0
4
GPIO0
Submit Documentation Feedback
t 1
4
shows the IO MUX functions of each pin. For
Function 1
Function 2
GPIO0
—
13
ESP32-C3 Family Hardware Design Guidelines V1.0
Min
(ms)
0
3
ESP32-C3 Family
Datasheet.
Reset
Notes
0
R
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