Maskable Interrupt Request Acceptance Operation - NEC UPD789026 Series User Manual

8-bit single-chip
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10.4.2 Maskable interrupt request acceptance operation

A maskable interrupt request can be accepted when the interrupt request flag is set to 1 and the corresponding
interrupt mask flag is cleared to 0. A vectored interrupt request is accepted in the interrupt enabled status (when the
IE flag is set to 1).
The time required to start the interrupt processing after a maskable interrupt request has been generated is
shown in Table 10-3.
See Figures 10-12 and 10-13 for the interrupt request acceptance timing.
When two or more maskable interrupt requests are generated at the same time, they are accepted starting from
the interrupt request assigned the highest priority.
A pended interrupt is accepted when the status where it can be accepted is set.
Figure 10-11 shows the algorithm of accepting interrupt requests.
When a maskable interrupt request is accepted, the contents of PSW and PC are saved to the stack in that
order, the IE flag is reset to 0, and the data in the vector table determined for each interrupt request is loaded to the
PC, and execution branches.
To return from interrupt processing, use the RETI instruction.
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CHAPTER 10 INTERRUPT FUNCTIONS
Table 10-3. Time from Generation of Maskable Interrupt Request to Processing
Minimum Time
9 clocks
Note The wait time is maximum when an interrupt
request is generated immediately before BT and
BF instruction.
Remark
1 clock:
Maximum Time
19 clocks
1
(f
: CPU clock)
CPU
f
CPU
User's Manual U11919EJ3V0UM00
Note
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