(4)
Baud rate generator control register 00 (BRGC00)
This register is used to set the serial clock of serial interface 00.
BRGC00 is set with an 8-bit memory manipulation instruction.
RESET input clears BRGC00 to 00H.
Symbol
BRGC00
TPS003 TPS002
TPS003
Note Only used in UART mode.
Cautions 1. When writing to BRGC00 is performed during a communication operation, the baud
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Remarks 1. f
CHAPTER 9 SERIAL INTERFACE 00
Figure 9-6. Baud Rate Generator Control Register 00 Format
7
6
5
TPS001 TPS000
TPS002
TPS001
TPS000
0
0
0
0
0
0
0
0
1
0
0
1
0
1
0
0
1
0
0
1
1
0
1
1
1
0
0
Other than above
rate generator output is disrupted and communications cannot be performed normally.
Be sure not to write to BRGC00 during communication operation.
2. Be sure not to select n = 1 during an operation at f
the baud rate limit.
3. When selecting an input clock from an external source, set port mode register 2 (PM2)
to the input mode.
: System clock oscillation frequency
X
2. n : Value determined by setting TPS000 through TPS003 (1 ≤ n ≤ 8)
3. The parenthesized values apply to operation at f
4
3
2
0
0
3-Bit Counter Source Clock Selection
0
f
/2
(2.5 MHz)
X
2
1
f
/2
(1.25 MHz)
X
3
0
f
/2
(625 kHz)
X
4
1
f
/2
(313 kHz)
X
5
0
f
/2
(156 kHz)
X
6
1
f
/2
(78.1 kHz)
X
7
0
f
/2
(39.1 kHz)
X
8
1
f
/2
(19.5 kHz)
X
0
Input clock from external to ASCK pin
Setting prohibited
User's Manual U11919EJ3V0UM00
1
0
Address
0
0
FF73H
Note
= 5.0 MHz because n = 1 exceeds
X
= 5.0 MHz.
X
After Reset
R/W
00H
R/W
n
1
2
3
4
5
6
7
8
–
129