NEC UPD789026 Series User Manual page 177

Program counter (PC)
Stack pointer (SP)
Program status word (PSW)
RAM
Ports (P0 to P5) (Output latch)
Port mode registers (PM0 to PM5)
Pull-up resistor option register (PUO)
Processor clock control register (PCC)
Oscillation settling time select register (OSTS)
16-bit timer
8-bit timer/event counter
Watchdog timer
Serial interface
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Interrupt
Notes 1. During reset input and oscillation settling time wait, only the PC contents among the hardware
2. In post-reset values are retained in the standby mode.
Table 12-1. Hardware Status after Reset
Hardware
Note 1
Data memory
General-purpose register
Timer counter (TM20)
Compare register (CR20)
Mode control register (TMC20)
Capture register (TCP20)
Timer counter (TM00)
Compare register (CR00)
Mode control register (TMC00)
Timer clock select register (TCL2)
Mode register (WDTM)
Mode register (CSIM00)
Asynchronous serial interface mode register (ASIM00)
Asynchronous serial interface status register (ASIS00)
Baud rate generator control register (BRGC00)
Transmit shift register (TXS00)
Receive buffer register (RXB00)
Request flag registers (IF0, IF1)
Mask flag registers (MK0, MK1)
External interrupt mode register (INTM0)
Key return mode register (KRM00)
statuses become undefined.
All other hardware remains unchanged after reset.
CHAPTER 12 RESET FUNCTION
User's Manual U11919EJ3V0UM00
State after Reset
The contents of reset vector
tables (0000H and 0001H)
are set.
Undefined
02H
Note 2
Undefined
Note 2
Undefined
00H
FFH
00H
02H
04H
0000H
FFFFH
00H
Undefined
00H
00H
00H
00H
00H
00H
00H
00H
00H
FFH
Undefined
00H
FFH
00H
00H
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