Processor 7/7 - Clevo P177SM Service Manual

Processor 7/7

CFG STRAPS FOR PROCESSOR
PCI EXPRESS STATIC LANE REVERSAL FOR ALL PEG PORTS
1: (DEFAULT)NORMAL OPERATION;
LANE# DEFINITION MATCHES
CFG2
SOCKET PIN MAP DEFINITION
0: LANE REVERSAL
CFG2 R85 *1K_04
CFG3 R103 *1K_04
DISPLAY PORT PRESENCE STRAP
1: DISABLED;
NO PHYSICAL DISPLAY PORT ATTACHED
TO EMBEDDED DISPLAY PORT
0: ENABLED;
CFG4
AN EXTERNAL DISPLAY PORT DEVICE
IS CONNECTED TO THE EMBEDDED
DISPLAY PORT
CFG4 R84 1K_04
[Note]Processor strap CFG[4] should be pulled low to enable Embedded DisplayPort
PCIE PORT BIFURCATION STRAPS
11: (Default) x16 - Device 1 functions 1 and 2 disabled
10: x8, x8 - Device 1 function 1 enabled ; function 2 disabled
CFG[6:5]
01: Reserved - (Device 1 function 1 disabled ; function 2 enabled)
00: x8,x4,x4 - Device 1 functions 1 and 2 enabled
CFG5
R82 *1K_04
CFG6 R81 *1K_04
DEFENSIVE PULL DOWN SITE
CFG7 1: (Default) PEG Train immediately following xxRESETB de assertion
0: PEG Wait for BIOS for training
CFG7 R83 *1K_04
Haswell Processor 7/7 ( RESERVED )
RSVD_AT1
RSVD_AT2
RSVD_A34
RSVD_A35
RSVD_W29
RSVD_W28
TESTLO_G26
VCORE
RSVD_C35
RSVD_B35
RSVD_AL25
RSVD_W30
RSVD_W31
TESTLO_W34
CFG0
CFG1
CFG2
CFG3
CFG4
CFG5
CFG6
CFG7
CFG8
CFG9
CFG10
CFG11
CFG12
CFG13
CFG14
CFG15
CFG[6:5]=11 for x16
Stanley
6,7,44 VCORE
U32I Haswell rPGA EDS
AT1
RSVD_TP
AT2 C23 RSVD_C23
RSVD_TP RSVD_TP
AD10 B23 RSVD_B23
RSVD RSVD_TP
D24 RSVD_D24
RSVD_TP
A34 D23 RSVD_D23
RSVD_TP RSVD_TP
A35
RSVD_TP
W29
RSVD_TP
W28 AT31 CFG_RCOMP
RSVD_TP CFG_RCOMP
G26 AR21 CFG16
TESTLO_G26 CFG_16
W33 AR23 CFG17
VSS CFG_18
AL30 AP21 CFG18
RSVD CFG_17
AL29 AP23 CFG19
RSVD CFG_19
F25
VCC
C35 AR33
RSVD_TP RSVD
B35 G6 FC_G6
RSVD_TP FC_G6
AM27
RSVD
AL25 AM26
RSVD_TP RSVD
F5
RSVD
W30 AM2
RSVD_TP RSVD
W31 K6
RSVD_TP RSVD
W34
TESTLO_W34
E18
RSVD
AT20
CFG_0
AR20 U10
CFG_1 RSVD
AP20 P10
CFG_2 RSVD
AP22
CFG_3
AT22 B1
CFG_4 NC
AN22 A2
CFG_5 RSVD
AT25 AR1
RSVD_AR1
CFG_6 RSVD_TP
AN23
AR24 CFG_7 E21
RSVD_E21
CFG_8 RSVD_TP
AT23 E20 RSVD_E20
CFG_9 RSVD_TP
AN20
CFG_10
AP24 AP27
CFG_11 VSS
AP26 AR26
CFG_12 VSS
AN25
CFG_13
AN26 AL31
CFG_14 VSS
AP25 AL32
CFG_15 VSS
9 OF 9
TESTLO_W34 R706 49.9_1%_04
TESTLO_G26 R707 49.9_1%_04
CFG_RCOMP
R708 49.9_1%_04
Reserve this circuit for future compatibility
PM_PCH_PWROK
PM_PCH_PWROK 21
R709
*2K_1%_04
FC_G6
R710
*1K_1%_04
Schematic Diagrams
Sheet 8 of 60
Processor 7/7
Processor 7/7 B - 9