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HBD-E385/E390/T39
HBD-E385/E390/T39
5-2.
BLOCK DIAGRAM - MEMORY/HDMI Section -
SD-RAM
IC106
DQL0 - DQL7,
DQU0 - DQU7
D0A0 - D0A13
A0 - A13
BA0
M2
BA1
N8
BA2
M3
/WE
L3
/CS
L2
/CAS
K3
/RAS
J3
ODT
K1
CKE
K9
CK
J7
/CK
K7
DMU
D3
DQSU
C7
/DQSU
B7
DML
E7
DQSL
F3
/DQSL
G3
/RESET
T2
WAVE
ARC_SPDIF
SHAPER
MAIN
IC5702
A
SECTION
(Page 31)
BUFFER
CEC
Q702
CN701
CEC
13
RESERVED (ARC)
14
TMDS DATA0 +
7
TMDS DATA0 –
9
TMDS DATA1 +
4
TMDS DATA1 –
6
TMDS DATA2 +
1
HDMI
TMDS DATA2 –
3
OUT ARC
TMDS CLOCK +
10
TMDS CLOCK –
12
SDA
16
SCL
15
HPD
19
+5V REG
+5V POWER
18
4
IC705
1
MAIN
B
SECTION
PCONT3
(Page 31)
+3.3V REG
4
IC704
BD DECODER
IC101 (2/3)
B11
NS_XTALO
RDQ0_B - RDQ15_B
X401
27MHz
A11
NS_XTALI
RDQ0 - RDQ15
RA0 - RA13
Y24
RBA0
AE24
RBA1
AD24
RBA2
AE25
RWE_
RCS_
Y23
AC22
RCAS_
W25
RRAS_
RODT
W24
AE23
RCKE
H24
RCLK0
H25
RCLK0_
R22
RDQM1
N25
RDQS1
N24
RDQS1_
R23
RDQM0
P24
RDQS0
P25
RDQS0_
AC25
RRESET
B15
CH0_P
A15
CH0_M
B14
CH1_P
A14
CH1_M
B13
CH2_P
A13
CH2_M
B16
CLK_P
A16
CLK_M
B19
HDMISD
B20
HDMISCK
C20
HTPLG
5
UNSW +6V
5
+3.3V
30
30
SD-RAM
IC206
DQL0 - DQL7,
DQU0 - DQU7
D1A0 - D1A13
RA0_B - RA13_B
A0 - A13
RBA0_B AB8
M2 BA0
RBA1_B W8
N8 BA1
RBA2_B AC11
M3 BA2
RWE_B
AA12
L3
/WE
RCS_B
/CS
AE10
L2
RCAS_B
Y12
K3
/CAS
RRAS_B
AE11
J3
/RAS
RODT_B AD10
K1 ODT
RCKE_B AA6
K9 CKE
RCLK0_B AD22
J7 CK
K7 /CK
RCLK0__B AE22
RDQM1_B
AA15
D3
DMU
RDQS1_B
DQSU
AD17
C7
RDQS1__B
AC17
B7
/DQSU
RDQM0_B
AB16
E7
DML
RDQS0_B AD16
F3 DQSL
RDQS0__B AE16
G3 /DQSL
RRESET_B AE7
T2 /RESET
EEPROM
IC6401
MFI_SDA AA2
13 I2C_SDA
MFI_SCL AA1
12 I2C_SCL
SYSCON_RST
A21
4 RESET
RESET_
NAND FLASH
IC501
NFD0 - NFD7
IO1 - IO8
NFWEN AD6
18 WE
WP
19
8 RE
NFREN AE4
NFCEN
AD4
9
CE
NFRBN
AD3
7
RY/BY
NFALE
AC6
17
ALE
NFCLE
AD5
16
CLE
MAIN
C
SECTION
CPU_XRST
(Page 31)
S
: VIDEO
: AUDIO
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