North Bridge Configuration - TYAN MITAC S8236 Hardware User Manual

Amd sr5690 & sp5100 chipsets
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3.7.1 North Bridge Configuration

Main
NorthBridge Chipset Configuration
 Memory Configuration
 ECC Configuration
 DRAM Timing Configuration
Memory Timing Parameters
Memory CLK
CAS Latency (Tcl)
RAS/CAS Delay (Trcd)
Row Precharge Time (Trp)
Min Active RAS (Tras)
RAS/RAS Delay (Trrd)
Row Cycle (Trc)
Read to Precharge (Trtp)
Write Recover Time (Twr)
Memory Timing Parameters
Select which node's timing parameters to display.
CPU Node 0 / CPU Node 1
BIOS Setup Utility
Advanced
PCI/PnP
http://www.tyan.com
Boot
Security
[CPU Node 0]
xxx, xxx
xxx, xxx
xxx, xxx
xxx, xxx
xxx, xxx
xxx, xxx
xxx, xxx
xxx, xxx
xxx, xxx
70
Chipset
Exit
Select Screen
↑↓ Select Item
Enter Go to Sub Screen
F1
General Help
F10 Save and Exit
ESC Exit

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