TYAN MITAC S8236 Hardware User Manual page 81

3.7.3.1.3 GPP1/GPP2/GPP3a/GPP3b Core Setting
Main
Turn Off PLL During L1/L23
TXCLK Clock Gating in L1
LCLK Clock Gating in L1
Turn Off PLL During L1/L23
Enabled / Disabled
TXCLK Clock Gating in L1
Enabled / Disabled
LCLK Clock Gating in L1
Enabled / Disabled
3.7.3.1.4 SB Core Setting
Main
TXCLK Clock Gating in L1
LCLK Clock Gating in L1
TXCLK Clock Gating in L1
Enabled / Disabled
LCLK Clock Gating in L1
Enabled / Disabled
BIOS Setup Utility
Advanced PCI/PnP
BIOS Setup Utility
Advanced PCI/PnP
http://www.tyan.com
Boot Security
[Enabled]
[Enabled]
[Enabled]
Boot Security
[Enabled]
[Enabled]
81
Chipset Exit
Enabled
Disabled
Select Screen
←
↑↓ Select Item
Enter Go to Sub Screen
F1 General Help
F10 Save and Exit
ESC Exit
Chipset Exit
Enabled
Disabled
Select Screen
←
↑↓ Select Item
Enter Go to Sub Screen
F1 General Help
F10 Save and Exit
ESC Exit