TYAN MITAC S8236 Hardware User Manual page 73

Amd sr5690 & sp5100 chipsets
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Disabled / 40ns / 80ns / 160ns / 320ns / 640ns / 1.28us / 2.56us / 5.12us /
10.2us/ 20.5us / 41.0us / 82.9us / 163.8us / 327.7us / 655.4us
L2/L3 Cache BG Scrub
Allow the L2/L3 Data Cache RAM to be corrected while idle.
Disabled / 40ns / 80ns / 160ns / 320ns / 640ns / 1.28us / 2.56us / 5.12us /
10.2us/ 20.5us / 41.0us / 82.9us / 163.8us / 327.7us / 655.4us
73
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