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ISL5217EVAL1
Evaluation Kit
Introduction
The ISL5217EVAL1 is an evaluation kit for the ISL5217
Quad Programmable Upconverter. The kit consists of an
evaluation Circuit Card Assembly (CCA) complete with the
ISL5217 device and additional circuitry to provide for control
via a computer parallel port. Windows based demonstration
software is provided for full user programmability and control
of all ISL5217 operational modes. The evaluation board
provides digital outputs which are accessible through
standard logic analyzer headers. It also provides both single
ended and differential analog outputs via SMA connectors
and Low Voltage Differential Signals (LVDS) outputs.
Documentation includes a user's manual, full evaluation
board schematics and PCB layout materials. Special filter
files, pattern files and example configuration script files are
included for quickly configuring the board.
Block Diagram
COMPUTER PARALLEL PORT
J10-COMP. INTFC
/17
U4
LVX161284
IEEE XCVR
/17
XCV150-4PQ240C
U10
/11
XC9572XL
CPLD
/4
U5
HC244
BUFFER
ADDRESS /20
3.3V
U12
REG
2.5V
U13
REG
AN9910 Rev.1.00
June 2001
J9-JTAG/MISC
J5-P<15:0>
DATA /16
ADDRESS /7
CONTROL /9
U3
SERIAL CHANNEL A /5
FPGA
SERIAL CHANNEL B /5
SERIAL CHANNEL C /5
SERIAL CHANNEL D /5
DATA /32
U2
CY7C1339
CONTROL /4
SRAM
J8-CONTROL
J17-FPGA DEBUG
U8
DS90CR217
5.0V
LVDS
J16
J12
V
IOUT
IN
Features
• Evaluation CCA complete with ISL5217 Programmable
Upconverter
• Windows-Based Demonstration Software
• Example Files For Common Modulation Techniques
• Parallel Port Ribbon Cable and Power Supply Cable
Reference Documents
• ISL5217EVAL1 CCA Demonstration Software in File
ISL5217.exe
• Example Configuration Files in *.js, Filter Files in *.coe,
and Pattern Files in *.pat
• ISL5217EVAL1 Schematics in File sch217eval1.pdf
• ISL5217EVAL1 Layout in File fab217eval1.pdf
SYNCO
IIN<19:0>
ISL5217
PROG. UP CONVERTER
P<15:0>
A<6:0>
RDMODE, OFFBIN, OUTEN<1:0>, WR
RD, CS, RST, TRITST
SDA, TXENA, UPDA, SCKLA, FSRA
SDB, TXENB, UPDB, SCKLB, FSRB
SDC, TXENC, UPDC, SCKLC, FSRC
SDD, TXEND, UPDD, SCKLD, FSRD
IOUT<19:0>
U9
DS90CR217
LVDS
CAS-SYNCO
J3 IOUT<19:0>
J13
QOUT
J4 QOUT<19:0>
USER'S MANUAL
J2 QIN<19:0>
J1 IIN<19:0>
CAS-IN-CLK
QIN<19:0>
U1
U6
OSC
U7
CY7B9111V
CLOCK BUF.
CLK
TO DEVICE CLKS
QOUT<19:0>
U11
HI5828
DAC
CAS-OUT-CLK
Page 1 of 6
AN9910
Rev.1.00
June 2001
EXTERNAL CLK
J11
SMA
J14
SMA
QOUT
J15
SMA
IOUT
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Related Manuals for Renesas ISL5217EVAL1
Summary of Contents for Renesas ISL5217EVAL1
- Page 1 Evaluation Kit Rev.1.00 June 2001 Introduction Features The ISL5217EVAL1 is an evaluation kit for the ISL5217 • Evaluation CCA complete with ISL5217 Programmable Quad Programmable Upconverter. The kit consists of an Upconverter evaluation Circuit Card Assembly (CCA) complete with the •...
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Page 2: Getting Started
ISL5217EVAL1 configuration of the ISL5217. The RAM can hold I/Q Getting Started stimulus patterns that are repeatable with no overhead. Installation Requirements 3. CPLD U10: The CPLD’s main function is serve as the 1. A personal computer running Windows 95, Windows 98, or configuration handler between the PC’s parallel port and... -
Page 3: Software Description
ISL5217EVAL1 7. Connect the supplied ribbon cable from the PC’s parallel inside these forms, refer to the ISL5217 data sheet. port to the evaluation board’s J10 connector ensuring the Switching between forms can be done using the Tab toolbar. arrow indicating pin one on the ribbon cable connector J1 A brief discussion of the software forms follows: and the CCA J10-1 are correctly mated. -
Page 4: Pull Down Menus
ISL5217EVAL1 Board: This form has mixed controls for both the device and Run Script: Allows the user to select and load a script file. the board. For the ISL5217 device, it controls the pins for Start Recording: Begins recording the user’s actions that TXENA-D, the Mp mode, OUTEN0-1, TRITEST, and OFFBIN. - Page 5 ISL5217EVAL1 TABLE 1. JUMPER CONFIGURATION JUMPER TYPE POSITION DEFAULT FUNCTION On/Off Enables SYNCO as the CAS-SYNC0 J3-39 Output. Disables SYNCO as the CAS-SYNC0 J3-39 Output. On/Off Enables UPDA as the CAS-SYNC0 J3-39 Output. Disables UPDA as the CAS-SYNC0 J3-39 Output.
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Page 6: Corporate Headquarters
Renesas' products are provided only subject to Renesas' Terms and Conditions of Sale or other applicable terms agreed to in writing. No use of any Renesas resources expands or otherwise alters any applicable warranties or warranty disclaimers for these products.