Renesas RX Family Application Note page 17

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RX Family
Figure 2.13, Figure 2.14, and Figure 2.15 show example clock I/O pin wiring patterns.
Strengthen the GND guard
between the front side and
back side with optimal
placement of through
holes. In particular, ensure
that both edges of the
guard do not form an
antenna.
Through hole
Front side wiring pattern
Back side wiring pattern
R01AN1411EJ0110 Rev.1.10
Oct.26.21
Crystal
oscillator
C
R
Crystal
C
oscillator
Figure 2.13 Example Clock I/O Pin Wiring Pattern
The inner layers must have no wiring
traces in the areas enclosed by the
yellow borders, which is used for the
GND wiring pattern on the back side.
Also, the back side GND wiring
traces should be at least 0.1 mm
wider than the front side GND wiring
traces. However, there must be no
wiring traces on the back side if the
board thickness is less than 1.2 mm.
C
R
Resistor
R
Hardware Design Guide
RX Family
XCIN
XCOUT
XTAL
VSS
EXTAL
Capacitor
C
Page 17 of 32

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