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Summary of Contents for Lauterbach MicroBlaze Debugger
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Page 1: Microblaze Debugger And Trace
MicroBlaze Debugger and Trace Release 09.2021 MANUAL... -
Page 2: Table Of Contents
ICD In-Circuit Debugger ........................ Processor Architecture Manuals .................... MicroBlaze ..........................MicroBlaze Debugger and Trace ..................General Note ........................Brief Overview of Documents for New Users ..............MicroBlaze debug and trace features supported by TRACE32 ........ESD Protection ........................ - Page 3 Load MMU table from CPU Real-Time Trace ......................... SYStem.Option.DTM Control data trace messages SYStem.Option.QUICKSTOP Control trace of software breakpoints Configuring your FPGA ....................JTAG Connector ........................ Mechanical Description JTAG Connector for Xilinx Microblaze 1989-2021 © Lauterbach GmbH MicroBlaze Debugger and Trace...
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Page 4: General Note
Before starting please be sure to have up to date debugger software by getting an update from the LAUTERBACH website. Note that the downloads on the website are stable releases but not necessarily the latest versions. Therefore in case of problems please contact LAUTERBACH support at support@lauterbach.com... -
Page 5: Microblaze Debug And Trace Features Supported By Trace32
Off-chip program and data trace are supported via the MicroBlaze Debug Module (MDM). • Use the Xilinx Vivado Design Suite for hardware analysis and the Lauterbach TRACE32 infrastructure for software debugging - over a single (shared) connection to the target board via Lauterbach hardware. -
Page 6: Esd Protection
Switch the target power ON. Configure your debugger e.g. via a start-up script. Power down: Switch off the target power. Disconnect the Debug Cable from the target. Close the TRACE32 software. Power OFF the TRACE32 hardware. 1989-2021 © Lauterbach GmbH MicroBlaze Debugger and Trace... -
Page 7: Quick Start Of The Debugger
The FPGA configuration can be done using Xilinx Vivado (or its predecessor Xilinx iMPACT) or the TRACE32 command JTAG.PROGRAM (or the old version of the command, JTAG.LOADBIT). After starting the TRACE32 software enter the following commands for connecting to the target and load a sample file: 1989-2021 © Lauterbach GmbH MicroBlaze Debugger and Trace... - Page 8 Attach to the target and enter debug mode, using the multicore settings from above: SYStem.Up This command resets the CPU and enters debug mode. After executing this command, memory and registers can be accessed. 1989-2021 © Lauterbach GmbH MicroBlaze Debugger and Trace...
- Page 9 Refer for more information to Data.LOAD.Elf. Open the disassembly and register windows: Data.List ; Open disassembly window Register ; Open register window You are now ready to debug your program. 1989-2021 © Lauterbach GmbH MicroBlaze Debugger and Trace...
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Page 10: Quick-Start Of The Real-Time Trace
Trace.METHOD Analyzer ; Tell TRACE32 that we wish to use off-chip trace. Trace.PortSize 16. ; Configure the number of connected data pins Trace.AutoFocus ; Execute a test program to detect the best ; electrical parameters for sampling. 1989-2021 © Lauterbach GmbH MicroBlaze Debugger and Trace... -
Page 11: Compiling Software With Debug Information
MicroBlaze software with the GCC option -g3. The option -g creates debug info that does not work well with TRACE32. Also keep in mind that using code optimization can cause problems with debugging. NOTE: It is recommended to compile MicroBlaze software with the GCC option -g3. 1989-2021 © Lauterbach GmbH MicroBlaze Debugger and Trace... -
Page 12: Troubleshooting
CPU on every SYStem.Up. You used a wrong JTAG connector on the target. In particular on ML310 always use the 14pin JTAG connector J9 for debugging Microblaze. Please refer to our Frequently Asked Questions page on the Lauterbach website. 1989-2021 ©... -
Page 13: Displaying Microblaze Core Configuration
As the Microblaze core is configurable the available debug features depend on the current core. The configuration of the core can be displayed using the command per.When pointing the mouse at an entry, the debugger displays an explanation in the status line. 1989-2021 © Lauterbach GmbH MicroBlaze Debugger and Trace... -
Page 14: Cpu Specific Implementations
(instead of indicating a bus error). Once the stack pointer is set up correctly inside the exception handler, the stack area is displayed correctly. 1989-2021 © Lauterbach GmbH MicroBlaze Debugger and Trace... -
Page 15: Breakpoints
SYStem.Option.BrkVector may be required. On-chip Breakpoints Onchip breakpoints (Lauterbach terminology) allow to stop the core in specific conditions. As this is implemented via hardware-resources, they are also referred to as “hardware breakpoints” in non- Lauterbach terminology. The following list gives an overview of the usage of the on-chip breakpoints by TRACE32-ICD: •... -
Page 16: Example For Breakpoints
0x100000 /Program Break.Set 0x101000 /Program ; Software Breakpoint 2 Break.Set 0xx /Program ; Software Breakpoint 3 On-chip breakpoints: Break.Set 0x100 /Program ; On-chip Breakpoint 1 Break.Set 0x0ff00 /Program ; On-chip Breakpoint 2 1989-2021 © Lauterbach GmbH MicroBlaze Debugger and Trace... -
Page 17: System.option.brkhandler
The option must be set before attaching to the target to have an effect. The vector should be 32bit-aligned. Do not use 0x0 as break vector. For ucLinux it is recommended to set the handler address to 0x70. 1989-2021 © Lauterbach GmbH MicroBlaze Debugger and Trace... -
Page 18: System.option.imaskasm
Separate address spaces by space IDs Format: SYStem.Option.MMUSPACES [ON | OFF] SYStem.Option.MMUspaces [ON | OFF] (deprecated) SYStem.Option.MMU [ON | OFF] (deprecated) Default: OFF. Enables the use of space IDs for logical addresses to support multiple address spaces. 1989-2021 © Lauterbach GmbH MicroBlaze Debugger and Trace... -
Page 19: System.option.resetmode
Use this option to select the reset mode. CORE will only reset the MicroBlaze core while SYSTEM will also reset the peripherals. Note that a reset of the MicroBlaze core does not reset the register R1-R31, caches and UTLB. 1989-2021 © Lauterbach GmbH MicroBlaze Debugger and Trace... -
Page 20: System.option.dualport
Sample script for opening term window attached to MDM UART core: TERM.RESet ; be sure to reset term functionality TERM.METHOD.MDMUART ; configure MDM UART for stdio TERM.SIZE 110. 1000. ; cosmetics TERM.GATE ; make T32 poll the target for data 1989-2021 © Lauterbach GmbH MicroBlaze Debugger and Trace... - Page 21 To confirm if the MDM UART is enabled in your design, open the peripheral window via the command and look for the section “MDM UART Configuration”. 1989-2021 © Lauterbach GmbH MicroBlaze Debugger and Trace...
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Page 22: Memory Classes
These names are also used in the disassembly views and the Data.Assemble command. This is in deviation from the Xilinx suggestions to use rmsr, rslr, etc. in the context of assembly language. Data.Assemble 0x1000 mfs r0, MSR Data.Assemble 0x1004 mts SLR, r3 1989-2021 © Lauterbach GmbH MicroBlaze Debugger and Trace... -
Page 23: Cpu Specific System Commands
SYStem.Up Note that all the cores inside an FPGA share identical multicore settings (PRE, POST values) because they are accessed via the same TAP controller implemented in the Xilinx MDM IP block. 1989-2021 © Lauterbach GmbH MicroBlaze Debugger and Trace... -
Page 24: System.jtagclock
If the system is locked, no access to the debug port will be performed by the debugger. While locked, the debug connector of the debugger is tristated. The main intention of the SYStem.LOCK command is to give debug access to another tool. 1989-2021 © Lauterbach GmbH MicroBlaze Debugger and Trace... -
Page 25: System.memaccess
Temporarily halts the core(s) to perform the memory access. Each stop takes some time depending on the speed of the JTAG port, the number of the assigned cores, and the operations that should be performed. For more information, see below. 1989-2021 © Lauterbach GmbH MicroBlaze Debugger and Trace... -
Page 26: System.mode
CPU is not reset. The BDM/JTAG/COP interface will be synchronized and the CPU state will be read out. After this command the CPU is in the SYStem.Up mode and can be stopped for debugging. StandBy Not supported. 1989-2021 © Lauterbach GmbH MicroBlaze Debugger and Trace... -
Page 27: System.config
TDO signal of the debugger. If each core in the system contributes only one TAP to the JTAG chain, DRPRE is the number of cores between the core of interest and the TDO signal of the debugger. 1989-2021 © Lauterbach GmbH MicroBlaze Debugger and Trace... - Page 28 (default: OFF) If more than one debugger share the same debug port, all except one must have this option active. JTAG: Only one debugger - the “master” - is allowed to control the signals nTRST and nSRST (nRESET). 1989-2021 © Lauterbach GmbH MicroBlaze Debugger and Trace...
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Page 29: Daisy-Chain Example
; IR Core A + B SYStem.CONFIG.DRPRE ; DR Core D SYStem.CONFIG.DRPOST 2. ; DR Core A + B SYStem.CONFIG.CORE 0. 1. ; Target Core C is Core 0 in Chip 1 1989-2021 © Lauterbach GmbH MicroBlaze Debugger and Trace... -
Page 30: Tapstates
TapStates Exit2-DR Exit1-DR Shift-DR Pause-DR Select-IR-Scan Update-DR Capture-DR Select-DR-Scan Exit2-IR Exit1-IR Shift-IR Pause-IR Run-Test/Idle Update-IR Capture-IR Test-Logic-Reset 1989-2021 © Lauterbach GmbH MicroBlaze Debugger and Trace... -
Page 31: System.config.core Assign Core To Trace32 Instance
(config.t32). If the system contains fewer chips than initially assumed, the chips must be merged by calling SYStem.CONFIG.CORE. For MicroBlaze specific information please refer to “Connecting to MicroBlaze Targets for Debug and Trace” (app_microblaze.pdf). 1989-2021 © Lauterbach GmbH MicroBlaze Debugger and Trace... -
Page 32: System.config.state
NOTE: If your design has multiple MDMs, use the command SYStem.CONFIG.MDM DebugPort to make sure the debugger connects to the correct MDM instance. SYStem.CONFIG.MDM.RESet Reset MDM configuration Format: SYStem.CONFIG.MDM.RESet Resets MDM settings. 1989-2021 © Lauterbach GmbH MicroBlaze Debugger and Trace... -
Page 33: System.config.mdm.view
Usually, a design with multiple MicroBlaze cores will use a single MDM shared by all cores. In that case, you need to use the command SYStem.CONFIG.MDM DebugPort to select the desired core. 1989-2021 © Lauterbach GmbH MicroBlaze Debugger and Trace... -
Page 34: Tronchip Commands
Break.Set 0x1001--0x17ff /Write ; 1000--17ff sets single breakpoint … ; at address 1001 TrOnchip.CONVert OFF ; sets breakpoint at range Break.Set 0x1000--0x17ff /Write ; 1000--17ff Break.Set 0x1001--0x17ff /Write ; gives an error message 1989-2021 © Lauterbach GmbH MicroBlaze Debugger and Trace... -
Page 35: Tronchip.varconvert Adjust Complex Breakpoint In On-Chip Resource
CPU may be not powerful enough to cover the whole structure. If the option TrOnchip.VarCONVert is set to ON, the breakpoint will automatically be converted into a single address breakpoint. This is the default setting. Otherwise an error message is generated. 1989-2021 © Lauterbach GmbH MicroBlaze Debugger and Trace... -
Page 36: Cpu Specific Mmu Commands
Displays the entries of an MMU translation table. • if <range> or <address> have a space ID: displays the translation table of the specified process • else, this command displays the table the CPU currently uses for MMU translation. 1989-2021 © Lauterbach GmbH MicroBlaze Debugger and Trace... -
Page 37: Mmu.list
<address>. For most table types, the arguments <range> or <address> can also be used to select the translation table of a specific process if a space ID given. 1989-2021 © Lauterbach GmbH MicroBlaze Debugger and Trace... - Page 38 This command reads the table of the specified process, <space_id>:0x0 and lists its address translation. • For information about the first three parameters, see “What to know about the Task Parameters” (general_ref_t.pdf). • See also the appropriate OS Awareness Manuals. 1989-2021 © Lauterbach GmbH MicroBlaze Debugger and Trace...
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Page 39: Mmu.scan
This command reads the OS kernel MMU table and the MMU tables of all processes and copies the complete address translation into the debugger- internal static translation table. See also the appropriate OS Awareness Manual. 1989-2021 © Lauterbach GmbH MicroBlaze Debugger and Trace... -
Page 40: Real-Time Trace
As this can last some milliseconds, the trace buffer will contain irrelevant trace data. By enabling the option is enabled, the debugger sets an on-chip breakpoint onto the software break handler and thus stops the core immediately. 1989-2021 © Lauterbach GmbH MicroBlaze Debugger and Trace... -
Page 41: Configuring Your Fpga
JTAG overrides other configurations like MSI, SPI etc. In the latter case configuration via TRACE32 may fail silently (no error message), though configuration via Xilinx Impact works. 1989-2021 © Lauterbach GmbH MicroBlaze Debugger and Trace... -
Page 42: Jtag Connector
JTAG Connector for Xilinx Microblaze It is recommended to connect all N/C Pins to GND (if you work with LAUTERBACH tools only). The following chart details the pinout of the16 pin PPC400 debug cable, that is also used for debugging Microblaze cores.
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