Sony MAV-70 Manual page 75

Multi access video and audio server
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MAV-70
Recording System
The video and audio signals input from the BKMA-7010
(encoder/decoder) and/or BKMA-7020 (encoder) are
compressed and recorded on SDRAM of a PCI control
circuit. The PCI control circuit on the PU-102 board
transfers the SDRAM data on each encoder board to the
PU-102 board according to the instructions from the
system control block of the MAV-70 and records it on the
HDD array.
Playback System
Data is reproduced from the HDD array according to the
instructions from the system control block of the MAV-70
and transferred to SDRAM on each decoder board. The
compression data recorded on SDRAM of the BKMA-
7010 (encoder/decoder) and/or BKMA-7030 (decoder) are
expanded, decoded to video and audio signals, and then
output.
HDD Array Block
During recording, on the PU-102 board, the compression
data sent via a PCI bus is distributed into seven HDDs and
then recorded. Simultaneously with recording, parity data
is generated and recorded on the parity HDD.
During playback, the data read from seven HDDs is sent
through a PCI bus to the decoder. If one HDD can normal-
ly read no data due to failure, the data of the defective
HDD is recovered based on the data of the parity HDD and
remaining six HDDs.
MAV-70
Section 4
Circuit Description
System Control
The disk protocol control signal from a host controller is
input from the REMOTE terminal and sent to the DPC
(disk protocol controller) CPU (IC513) on the SY-253
board. In the DPC CPU, the disk protocol control signal is
hand-shaked and sent through dual-port RAMs (IC501 and
IC529) to the main CPU (IC306) as a command. The
status is sent from the main CPU to the host controller via
a reverse route.
The FSE (file system engine) CPU (IC410) manages the
file system database of the file name on the recorded image
and the HDD's LBA data. It is controlled by a command
(file generation, retrieval, or deletion) that is sent from the
main CPU through dual-port RAMs (IC401 and IC423).
The CPU (IC101) on the CCM-37 board controls the
10Base-T Ethernet standard. IC101 sends a command to
the main CPU through the dual-port RAMs (IC801 and
IC802) on the SY-253 board when the file system is
downloaded or uploaded using a personal computer.
Main CPU (IC306) sends a command or receives a status
to or from each option board (BKMA-7000 series) or HDD
array (PU-102 board) through a PCI controller (IC203)
while exchanging commands or status with each CPU
above.
The CPU (IC3) on the DP-269 board of the front panel
communicates in serial with the main CPU on the SY-253
board via RS-232C, and sends the key switch information
or receives the information displayed on the LCD panel.
4-1 (E)

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