Sony NV-U74 Service Manual page 37

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• IC Pin Function Description
MAIN BOARD IC0105 GSC3ELP7975TR (GPS CONTROLLER)
Pin No.
Pin Name
A1
GND_BB
A2
GPIO1/ODO
A3
RESERVED
A4
GPIO0
A5
RXA
A6
TXA
A7
ECLK
A8
SCLK
A9
EA0
A10
VDDKPLL_O
B1
RFPWRUP/GPIO8
B2
XMWE
B3
VDD_FLASH
B4
VDD_RTC
B5
XEITO/GPIO10
B6
EA4
B7
TXB
B8
RESERVED
B9
EA1
B10
VDDK
C1
XCS2/GPIO14/XRTS
C2, C3
ED1, ED10
C4
VDD_REG
C5
VDD_PLL
C6
TIMEMARK/GPIO9
C7
RXB
C8
RESERVED
C9
EA3
C10
VDDK
D1
XMOE
D2
ED4
D3
XCS0
D4
VDD_BB
D5, D6
GND_BB
D7 to D9
EA2, EA5, EA6
D10
TMODE
E1
XCS3/GPIO15/YCLK
E2, E3
ED9, ED8
E4
VDD_BB
E5, E6
GND_BB
E7
XWAKEUP
E8, E9
EA7, EA8
E10
ROUT
F1
XCS1/GPIO13/XCTS
F2, F3
ED3, ED2
F4
VDD_BB
F5, F6
GND_BB
F7
VDD_REG
F8, F9
EA18, EA19
F10
RIN
G1
ED0
G2 to G4
ED12, ED11, ED14
I/O
-
Ground terminal
I/O
Not used
-
Not used
I/O
Not used
I
Serial data input from the CPU
O
Serial data output to the CPU
I
External clock signal input terminal
O
System clock signal output terminal
O
Address signal output to the fl ash memory
O
Regulator output terminal for PLL
O
Power control signal output terminal
O
Write enable signal output to the fl ash memory
-
Power supply terminal (+2.85V)
-
Power supply terminal (+1.5V)
I/O
External interrupt signal input/output terminal
O
Address signal output to the fl ash memory
O
Serial data output terminal
-
Not used
O
Address signal output to the fl ash memory
O
External capacitor for bypass connection terminal
Chip select signal input/output terminal or request to send signal input/output terminal
I/O
Not used
I/O
Two-way data bus with the fl ash memory
-
Power supply terminal (+2.85V)
-
Power supply terminal (+2.85V)
O
Precise positioning service signal output to the CPU
I
Serial data input terminal
-
Not used
O
Address signal output to the fl ash memory
O
External capacitor for bypass connection terminal
O
Output enable signal output to the fl ash memory
I/O
Two-way data bus with the fl ash memory
O
Chip select signal output to the fl ash memory
-
Power supply terminal (+2.85V)
-
Ground terminal
O
Address signal output to the fl ash memory
-
Not used
I/O
Chip select signal input/output terminal or Y signal input terminal
I/O
Two-way data bus with the fl ash memory
-
Power supply terminal (+2.85V)
-
Ground terminal
O
Wake-up signal output terminal
O
Address signal output to the fl ash memory
O
Not used
Chip select signal input/output terminal or clear to send signal input/output terminal
I/O
Not used
I/O
Two-way data bus with the fl ash memory
-
Power supply terminal (+2.85V)
-
Ground terminal
-
Power supply terminal (+2.85V)
O
Address signal output terminal
I
32.768 kHz clock signal input terminal
I/O
Two-way data bus with the fl ash memory and RAM clear signal input from the CPU
I/O
Two-way data bus with the fl ash memory
Description
Not used
Not used
Not used
Not used
Not used
Not used
Not used
Not used
NV-U74
Not used
37

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