Texas Instruments Jacinto 7 DRA829 User Manual
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User's Guide
Optimized Dual TPS6594-Q1 PMIC User Guide for
Jacinto
7 DRA829 or TDA4VM Automotive PDN-0C
This user's guide can be used as a guide for integrating the TPS6594-Q1 power management integrated circuit
(PMIC) into a system powering the DRA829 or TDA4VM processor.
1
Introduction.............................................................................................................................................................................2
2 Device Versions......................................................................................................................................................................
Connections..........................................................................................................................................................4
3.1 Power Mapping..................................................................................................................................................................
Mapping.................................................................................................................................................................7
4 Supporting Functional Safety Systems..............................................................................................................................
Settings..............................................................................................................................................................15
5.2 Device Identification Settings...........................................................................................................................................
5.3 BUCK Settings.................................................................................................................................................................
Settings....................................................................................................................................................................20
5.5 VCCA Settings.................................................................................................................................................................
5.6 GPIO Settings..................................................................................................................................................................
5.7 Finite State Machine (FSM) Settings...............................................................................................................................
Settings..............................................................................................................................................................24
Settings...................................................................................................................................................27
5.10 Miscellaneous Settings..................................................................................................................................................
Settings............................................................................................................................................................29
5.12 Multi-Device Settings.....................................................................................................................................................
5.13 Watchdog Settings.........................................................................................................................................................
6 Pre-Configurable Finite State Machine (PFSM) Settings..................................................................................................
6.1 Configured States............................................................................................................................................................
6.2 PFSM Triggers.................................................................................................................................................................
6.3 Power Sequences............................................................................................................................................................
7 Application Examples..........................................................................................................................................................
7.1 Moving Between States; ACTIVE, MCU ONLY, and RETENTION..................................................................................
Standby...........................................................................................................................................51
7.3 Entering and Existing LP_STANDBY...............................................................................................................................
7.4 Runtime Customization....................................................................................................................................................
8 References............................................................................................................................................................................
Trademarks
Jacinto
are trademarks of Texas Instruments.
All trademarks are the property of their respective owners.
SLVUC99 - JANUARY 2022
Submit Document Feedback
ABSTRACT

Table of Contents

Requirements.........................................................................................................................12
Requirements................................................................................................................12
Settings........................................................................................................................15
Copyright © 2022 Texas Instruments Incorporated
Optimized Dual TPS6594-Q1 PMIC User Guide for Jacinto
Table of Contents
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7 DRA829 or
TDA4VM Automotive PDN-0C
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Summary of Contents for Texas Instruments Jacinto 7 DRA829

  • Page 1: Table Of Contents

    Texas Instruments. All trademarks are the property of their respective owners. SLVUC99 – JANUARY 2022 Optimized Dual TPS6594-Q1 PMIC User Guide for Jacinto ™ 7 DRA829 or Submit Document Feedback TDA4VM Automotive PDN-0C Copyright © 2022 Texas Instruments Incorporated...
  • Page 2: Introduction

    PMIC device is distinguished by the part number, NVM_ID, and NVM_REV values listed in Table 2-1. ™ Optimized Dual TPS6594-Q1 PMIC User Guide for Jacinto 7 DRA829 or SLVUC99 – JANUARY 2022 TDA4VM Automotive PDN-0C Submit Document Feedback Copyright © 2022 Texas Instruments Incorporated...
  • Page 3 Retention, either GPIO or RAM, is configured by the processor. PDN-0C is recommended for all new designs. ™ SLVUC99 – JANUARY 2022 Optimized Dual TPS6594-Q1 PMIC User Guide for Jacinto 7 DRA829 or Submit Document Feedback TDA4VM Automotive PDN-0C Copyright © 2022 Texas Instruments Incorporated...
  • Page 4: Processor Connections

    BIST_FAIL_INT interrupt is set, and the device goes to the hardware SAFE RECOVERY state, see Figure 6-1, and main processor voltages are disabled. ™ Optimized Dual TPS6594-Q1 PMIC User Guide for Jacinto 7 DRA829 or SLVUC99 – JANUARY 2022 TDA4VM Automotive PDN-0C Submit Document Feedback Copyright © 2022 Texas Instruments Incorporated...
  • Page 5 ** VDD_SD_DV, 3.3 V then software changes to 1.8 V per HS-SD. ™ SLVUC99 – JANUARY 2022 Optimized Dual TPS6594-Q1 PMIC User Guide for Jacinto 7 DRA829 or Submit Document Feedback TDA4VM Automotive PDN-0C Copyright © 2022 Texas Instruments Incorporated...
  • Page 6 The TPS62813-Q1 is controlled by the TPS65941111-Q1 GPIO3 and remains active while TRIGGER_I2C_7, in FSM_I2C_TRIGGERS, is set. ™ Optimized Dual TPS6594-Q1 PMIC User Guide for Jacinto 7 DRA829 or SLVUC99 – JANUARY 2022 TDA4VM Automotive PDN-0C Submit Document Feedback Copyright © 2022 Texas Instruments Incorporated...
  • Page 7: Control Mapping

    DDR Retention modes, functional safety up to ASIL-D, and compliant dual voltage SD card operation. ™ SLVUC99 – JANUARY 2022 Optimized Dual TPS6594-Q1 PMIC User Guide for Jacinto 7 DRA829 or Submit Document Feedback TDA4VM Automotive PDN-0C Copyright © 2022 Texas Instruments Incorporated...
  • Page 8 I2C2 use the VINT voltage domain as an input and the VIO voltage domain as an output. Please refer to the ™ Optimized Dual TPS6594-Q1 PMIC User Guide for Jacinto 7 DRA829 or SLVUC99 – JANUARY 2022 TDA4VM Automotive PDN-0C Submit Document Feedback Copyright © 2022 Texas Instruments Incorporated...
  • Page 9 For details on how functional safety related connections help achieve functional safety system-level goals, see Section ™ SLVUC99 – JANUARY 2022 Optimized Dual TPS6594-Q1 PMIC User Guide for Jacinto 7 DRA829 or Submit Document Feedback TDA4VM Automotive PDN-0C Copyright © 2022 Texas Instruments Incorporated...
  • Page 10 LP_WKUP1 function is masked in the static settings. Instructions for unmasking the function are provided in Section 7.1.3, Section 7.2 Section 7.3. ™ Optimized Dual TPS6594-Q1 PMIC User Guide for Jacinto 7 DRA829 or SLVUC99 – JANUARY 2022 TDA4VM Automotive PDN-0C Submit Document Feedback Copyright © 2022 Texas Instruments Incorporated...
  • Page 11: Supporting Functional Safety Systems

    ASIL-D rating. See the DRA829/TDA4VM Safety Manual for Jacinto 7 Processors for a complete list of functional safety system assumptions. ™ SLVUC99 – JANUARY 2022 Optimized Dual TPS6594-Q1 PMIC User Guide for Jacinto 7 DRA829 or Submit Document Feedback TDA4VM Automotive PDN-0C Copyright © 2022 Texas Instruments Incorporated...
  • Page 12: Achieving Asil-B System Requirements

    Switch short-to-ground detection on BUCK regulator pins (SW_Bx) • Residual Voltage Monitoring • Read-back of Logic Output Pins ™ Optimized Dual TPS6594-Q1 PMIC User Guide for Jacinto 7 DRA829 or SLVUC99 – JANUARY 2022 TDA4VM Automotive PDN-0C Submit Document Feedback Copyright © 2022 Texas Instruments Incorporated...
  • Page 13 – nINT of both PMICs – nRSTOUT and nRSTOUT_SOC of the primary PMIC ™ SLVUC99 – JANUARY 2022 Optimized Dual TPS6594-Q1 PMIC User Guide for Jacinto 7 DRA829 or Submit Document Feedback TDA4VM Automotive PDN-0C Copyright © 2022 Texas Instruments Incorporated...
  • Page 14 PMIC-A -RVM LDO4 VDA_MCU_1V8 PMIC-A - OV & PMIC-A -CM PMIC-A -RVM ™ Optimized Dual TPS6594-Q1 PMIC User Guide for Jacinto 7 DRA829 or SLVUC99 – JANUARY 2022 TDA4VM Automotive PDN-0C Submit Document Feedback Copyright © 2022 Texas Instruments Incorporated...
  • Page 15: Static Nvm Settings

    • 2.2 MHz Full VOUT and Full VIN Range, Single Phase Only ™ SLVUC99 – JANUARY 2022 Optimized Dual TPS6594-Q1 PMIC User Guide for Jacinto 7 DRA829 or Submit Document Feedback TDA4VM Automotive PDN-0C Copyright © 2022 Texas Instruments Incorporated...
  • Page 16 2.2 MHz VOUT Less than 1.9 V Multiphase or Single Phase 470 nH ™ Optimized Dual TPS6594-Q1 PMIC User Guide for Jacinto 7 DRA829 or SLVUC99 – JANUARY 2022 TDA4VM Automotive PDN-0C Submit Document Feedback Copyright © 2022 Texas Instruments Incorporated...
  • Page 17: Device Identification Settings

    Enabled BUCK2_CONF BUCK2_SLEW_RATE 5.0 mV/μs 5.0 mV/μs BUCK2_ILIM 5.5 A 5.5 A ™ SLVUC99 – JANUARY 2022 Optimized Dual TPS6594-Q1 PMIC User Guide for Jacinto 7 DRA829 or Submit Document Feedback TDA4VM Automotive PDN-0C Copyright © 2022 Texas Instruments Incorporated...
  • Page 18 +10% / +100mV +3% / +30mV BUCK3_UV_THR -10% / -100mV -3% / -30mV ™ Optimized Dual TPS6594-Q1 PMIC User Guide for Jacinto 7 DRA829 or SLVUC99 – JANUARY 2022 TDA4VM Automotive PDN-0C Submit Document Feedback Copyright © 2022 Texas Instruments Incorporated...
  • Page 19 +5% / +50 mV BUCK5_UV_THR -5% / -50 mV -5% / -50 mV ™ SLVUC99 – JANUARY 2022 Optimized Dual TPS6594-Q1 PMIC User Guide for Jacinto 7 DRA829 or Submit Document Feedback TDA4VM Automotive PDN-0C Copyright © 2022 Texas Instruments Incorporated...
  • Page 20: Ldo Settings

    +5% / +50 mV LDO3_UV_THR -5% / -50 mV -5% / -50 mV ™ Optimized Dual TPS6594-Q1 PMIC User Guide for Jacinto 7 DRA829 or SLVUC99 – JANUARY 2022 TDA4VM Automotive PDN-0C Submit Document Feedback Copyright © 2022 Texas Instruments Incorporated...
  • Page 21: Vcca Settings

    GPIO2_DEGLITCH_EN 0x0 No deglitch, only 8 us deglitch time. synchronization. ™ SLVUC99 – JANUARY 2022 Optimized Dual TPS6594-Q1 PMIC User Guide for Jacinto 7 DRA829 or Submit Document Feedback TDA4VM Automotive PDN-0C Copyright © 2022 Texas Instruments Incorporated...
  • Page 22 GPIO8_DEGLITCH_EN 0x1 8 us deglitch time. No deglitch, only synchronization. ™ Optimized Dual TPS6594-Q1 PMIC User Guide for Jacinto 7 DRA829 or SLVUC99 – JANUARY 2022 TDA4VM Automotive PDN-0C Submit Document Feedback Copyright © 2022 Texas Instruments Incorporated...
  • Page 23: Finite State Machine (Fsm) Settings

    All these settings can be changed though I C after startup. ™ SLVUC99 – JANUARY 2022 Optimized Dual TPS6594-Q1 PMIC User Guide for Jacinto 7 DRA829 or Submit Document Feedback TDA4VM Automotive PDN-0C Copyright © 2022 Texas Instruments Incorporated...
  • Page 24: Interrupt Settings

    Low; Masking sets signal Low; Masking sets signal value to '0' value to '0' ™ Optimized Dual TPS6594-Q1 PMIC User Guide for Jacinto 7 DRA829 or SLVUC99 – JANUARY 2022 TDA4VM Automotive PDN-0C Submit Document Feedback Copyright © 2022 Texas Instruments Incorporated...
  • Page 25 Interrupt not generated. Interrupt not generated. GPIO8_FALL_MASK Interrupt not generated. Interrupt not generated. ™ SLVUC99 – JANUARY 2022 Optimized Dual TPS6594-Q1 PMIC User Guide for Jacinto 7 DRA829 or Submit Document Feedback TDA4VM Automotive PDN-0C Copyright © 2022 Texas Instruments Incorporated...
  • Page 26 Interrupt generated SOC_PWR_ERR_MAS Interrupt generated Interrupt generated ORD_SHUTDOWN_MA Interrupt generated Interrupt generated ™ Optimized Dual TPS6594-Q1 PMIC User Guide for Jacinto 7 DRA829 or SLVUC99 – JANUARY 2022 TDA4VM Automotive PDN-0C Submit Document Feedback Copyright © 2022 Texas Instruments Incorporated...
  • Page 27: Powergood Settings

    PGOOD_SEL_LDO1 Masked Masked PGOOD_SEL_LDO2 Masked Masked PGOOD_SEL_LDO3 Masked Masked PGOOD_SEL_LDO4 Masked Masked ™ SLVUC99 – JANUARY 2022 Optimized Dual TPS6594-Q1 PMIC User Guide for Jacinto 7 DRA829 or Submit Document Feedback TDA4VM Automotive PDN-0C Copyright © 2022 Texas Instruments Incorporated...
  • Page 28: Miscellaneous Settings

    Mixed dwell Mixed dwell SS_DEPTH No modulation No modulation SPREAD_SPECTRUM SS_PARAM1 SS_PARAM2 ™ Optimized Dual TPS6594-Q1 PMIC User Guide for Jacinto 7 DRA829 or SLVUC99 – JANUARY 2022 TDA4VM Automotive PDN-0C Submit Document Feedback Copyright © 2022 Texas Instruments Incorporated...
  • Page 29: Interface Settings

    I2C1_ID_REG I2C1_ID 0x48 0x48 0x4c 0x4C I2C2_ID_REG I2C2_ID 0x12 0x12 0x13 0x13 ™ SLVUC99 – JANUARY 2022 Optimized Dual TPS6594-Q1 PMIC User Guide for Jacinto 7 DRA829 or Submit Document Feedback TDA4VM Automotive PDN-0C Copyright © 2022 Texas Instruments Incorporated...
  • Page 30: Multi-Device Settings

    This section describes the default PFSM settings of the TPS6594-Q1 devices. These settings cannot be changed after device startup. ™ Optimized Dual TPS6594-Q1 PMIC User Guide for Jacinto 7 DRA829 or SLVUC99 – JANUARY 2022 TDA4VM Automotive PDN-0C Submit Document Feedback Copyright © 2022 Texas Instruments Incorporated...
  • Page 31: Configured States

    The hardware states are part of the fixed device power Finite State Machine (FSM) and described in the TPS6594-Q1 data sheet, see Section ™ SLVUC99 – JANUARY 2022 Optimized Dual TPS6594-Q1 PMIC User Guide for Jacinto 7 DRA829 or Submit Document Feedback TDA4VM Automotive PDN-0C Copyright © 2022 Texas Instruments Incorporated...
  • Page 32 BUCK and LDO regulators, set the FIRST_STARTUP_DONE bit and ™ Optimized Dual TPS6594-Q1 PMIC User Guide for Jacinto 7 DRA829 or SLVUC99 – JANUARY 2022 TDA4VM Automotive PDN-0C Submit Document Feedback Copyright © 2022 Texas Instruments Incorporated...
  • Page 33: Pfsm Triggers

    MCU ONLY MCU_TO_WARM ESM MCU Error 9 False True MCU ONLY MCU ONLY ™ SLVUC99 – JANUARY 2022 Optimized Dual TPS6594-Q1 PMIC User Guide for Jacinto 7 DRA829 or Submit Document Feedback TDA4VM Automotive PDN-0C Copyright © 2022 Texas Instruments Incorporated...
  • Page 34 GPIO pin is pulled high, the NSLEEPx value is read as a high logic level. ™ Optimized Dual TPS6594-Q1 PMIC User Guide for Jacinto 7 DRA829 or SLVUC99 – JANUARY 2022 TDA4VM Automotive PDN-0C Submit Document Feedback Copyright © 2022 Texas Instruments Incorporated...
  • Page 35: Power Sequences

    TO_SAFE sequence does not reset the BUCK regulators until after the regulators are turned off. ™ SLVUC99 – JANUARY 2022 Optimized Dual TPS6594-Q1 PMIC User Guide for Jacinto 7 DRA829 or Submit Document Feedback TDA4VM Automotive PDN-0C Copyright © 2022 Texas Instruments Incorporated...
  • Page 36 REG_WRITE_MASK_IMM ADDR=0x81 DATA=0x04 MASK=0xE3 // Reset all BUCK regulators REG_WRITE_MASK_IMM ADDR=0x87 DATA=0x1F MASK=0xE0 ™ Optimized Dual TPS6594-Q1 PMIC User Guide for Jacinto 7 DRA829 or SLVUC99 – JANUARY 2022 TDA4VM Automotive PDN-0C Submit Document Feedback Copyright © 2022 Texas Instruments Incorporated...
  • Page 37 FORCE_EN_DRV_LOW in the TPS65941213 while only the SPMI_LP_EN is set in the TPS65941111. ™ SLVUC99 – JANUARY 2022 Optimized Dual TPS6594-Q1 PMIC User Guide for Jacinto 7 DRA829 or Submit Document Feedback TDA4VM Automotive PDN-0C Copyright © 2022 Texas Instruments Incorporated...
  • Page 38 REG_WRITE_MASK_IMM ADDR=0x87 DATA=0x1F MASK=0xE0 //TPS65941111 // Clear AMUXOUT_EN and CLKMON_EN and set LPM_EN ™ Optimized Dual TPS6594-Q1 PMIC User Guide for Jacinto 7 DRA829 or SLVUC99 – JANUARY 2022 TDA4VM Automotive PDN-0C Submit Document Feedback Copyright © 2022 Texas Instruments Incorporated...
  • Page 39 At the end of the sequence the 'FORCE_EN_DRV_LOW' bit is cleared so that the MCU can set the ENABLE_DRV bit. ™ SLVUC99 – JANUARY 2022 Optimized Dual TPS6594-Q1 PMIC User Guide for Jacinto 7 DRA829 or Submit Document Feedback TDA4VM Automotive PDN-0C Copyright © 2022 Texas Instruments Incorporated...
  • Page 40 µs. There is no change to the power rails. The sequence is shown in Figure 6-5. ™ Optimized Dual TPS6594-Q1 PMIC User Guide for Jacinto 7 DRA829 or SLVUC99 – JANUARY 2022 TDA4VM Automotive PDN-0C Submit Document Feedback Copyright © 2022 Texas Instruments Incorporated...
  • Page 41 3500 us VDD_USB_3V3 Figure 6-6. PWR_SOC_ERROR with I2C_7 High in both PMICs ™ SLVUC99 – JANUARY 2022 Optimized Dual TPS6594-Q1 PMIC User Guide for Jacinto 7 DRA829 or Submit Document Feedback TDA4VM Automotive PDN-0C Copyright © 2022 Texas Instruments Incorporated...
  • Page 42 REG_WRITE_MASK_IMM ADDR=0x81 DATA=0x00 MASK=0xFE // Increment Recovery Counter REG_WRITE_MASK_IMM ADDR=0xa5 DATA=0x01 MASK=0xFE ™ Optimized Dual TPS6594-Q1 PMIC User Guide for Jacinto 7 DRA829 or SLVUC99 – JANUARY 2022 TDA4VM Automotive PDN-0C Submit Document Feedback Copyright © 2022 Texas Instruments Incorporated...
  • Page 43 // TPS65941111 // Set AMUXOUT_EN, CLKMON_EN // Clear LPM_EN REG_WRITE_MASK_IMM ADDR=0x81 DATA=0x18 MASK=0xE3 ™ SLVUC99 – JANUARY 2022 Optimized Dual TPS6594-Q1 PMIC User Guide for Jacinto 7 DRA829 or Submit Document Feedback TDA4VM Automotive PDN-0C Copyright © 2022 Texas Instruments Incorporated...
  • Page 44 16200 us H_MCU_PORz_1V8 Figure 6-9. TO_MCU with I2C_7 high in both PMICs ™ Optimized Dual TPS6594-Q1 PMIC User Guide for Jacinto 7 DRA829 or SLVUC99 – JANUARY 2022 TDA4VM Automotive PDN-0C Submit Document Feedback Copyright © 2022 Texas Instruments Incorporated...
  • Page 45 REG_WRITE_MASK_IMM ADDR=0x82 DATA=0x00 MASK=0xE7 // Set NRSTOUT (MCU_PORZ) REG_WRITE_MASK_IMM ADDR=0x81 DATA=0x01 MASK=0xFE ™ SLVUC99 – JANUARY 2022 Optimized Dual TPS6594-Q1 PMIC User Guide for Jacinto 7 DRA829 or Submit Document Feedback TDA4VM Automotive PDN-0C Copyright © 2022 Texas Instruments Incorporated...
  • Page 46 12700 us H_MCU_PORz_1V8 nRSTOUT_SOC TPS65941213-Q1 12700 us H_SOC_PORz_1V8 Figure 6-11. TO_ACTIVE Sequence ™ Optimized Dual TPS6594-Q1 PMIC User Guide for Jacinto 7 DRA829 or SLVUC99 – JANUARY 2022 TDA4VM Automotive PDN-0C Submit Document Feedback Copyright © 2022 Texas Instruments Incorporated...
  • Page 47 REG_WRITE_MASK_IMM ADDR=0x82 DATA=0x18 MASK=0xE7 //TPS65941111 // Set SPMI_LP_EN REG_WRITE_MASK_IMM ADDR=0x82 DATA=0x10 MASK=0xEF ™ SLVUC99 – JANUARY 2022 Optimized Dual TPS6594-Q1 PMIC User Guide for Jacinto 7 DRA829 or Submit Document Feedback TDA4VM Automotive PDN-0C Copyright © 2022 Texas Instruments Incorporated...
  • Page 48 3500 us EN_3V3IO_LDSW Figure 6-12. TO_RETENTION when I2C_7 is low in both PMICs ™ Optimized Dual TPS6594-Q1 PMIC User Guide for Jacinto 7 DRA829 or SLVUC99 – JANUARY 2022 TDA4VM Automotive PDN-0C Submit Document Feedback Copyright © 2022 Texas Instruments Incorporated...
  • Page 49 The TPS65941213 device also performs an additional 16 ms delay based upon the contents of the register (PFSM_DELAY_REG_2) to ensure that the TPS65941213 sequence finishes last. ™ SLVUC99 – JANUARY 2022 Optimized Dual TPS6594-Q1 PMIC User Guide for Jacinto 7 DRA829 or Submit Document Feedback TDA4VM Automotive PDN-0C Copyright © 2022 Texas Instruments Incorporated...
  • Page 50: Application Examples

    MCU ONLY state the I2C_7 triggers must be set for both PMICs. Additionally, the TPS65941111 GPIO4 ™ Optimized Dual TPS6594-Q1 PMIC User Guide for Jacinto 7 DRA829 or SLVUC99 – JANUARY 2022 TDA4VM Automotive PDN-0C Submit Document Feedback Copyright © 2022 Texas Instruments Incorporated...
  • Page 51: Entering And Exiting Standby

    Write 0x48:0xC3:0x60;0x9F // Set the STARTUP_DEST=ACTIVE Write 0x48:0x64:0x08:0xF7 // clear interrupt of GPIO4 ™ SLVUC99 – JANUARY 2022 Optimized Dual TPS6594-Q1 PMIC User Guide for Jacinto 7 DRA829 or Submit Document Feedback TDA4VM Automotive PDN-0C Copyright © 2022 Texas Instruments Incorporated...
  • Page 52: Runtime Customization

    INIT and BOOT BIST. Through this transition the user registers are restored ™ Optimized Dual TPS6594-Q1 PMIC User Guide for Jacinto 7 DRA829 or SLVUC99 – JANUARY 2022 TDA4VM Automotive PDN-0C Submit Document Feedback Copyright © 2022 Texas Instruments Incorporated...
  • Page 53 ™ SLVUC99 – JANUARY 2022 Optimized Dual TPS6594-Q1 PMIC User Guide for Jacinto 7 DRA829 or Submit Document Feedback TDA4VM Automotive PDN-0C Copyright © 2022 Texas Instruments Incorporated...
  • Page 54: References

    • Texas Instruments, TPS6594-Q1 Power Management IC (PMIC) with 5 Bucks and 4 LDOs for Safety- Relevant Automotive Applications data sheet • Texas Instruments, TPS6594-Q1 Safety Manual (request through mySecure) • Texas Instruments, TPS6594-Q1 Schematic PCB Checklist application note ™...
  • Page 55 TI products. TI’s provision of these resources does not expand or otherwise alter TI’s applicable warranties or warranty disclaimers for TI products. TI objects to and rejects any additional or different terms you may have proposed. IMPORTANT NOTICE Mailing Address: Texas Instruments, Post Office Box 655303, Dallas, Texas 75265 Copyright © 2022, Texas Instruments Incorporated...

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