Table of Contents
Advertisement
www.ti.com
4 TPS272C45EVM Schematic
TP1
5010
U2
J5
VDD_IC
19
VDD
VS
8
VS
9
VS
23
VS
24
571-0500
VS
EN1_IC
16
EN1
C4
EN2_IC
15
EN2
4.7nF
D4
100V
S MBJ 36A-13-F
36V
FLT_IC/FLT1_IC
10
FLT
C5
100nF
DIA_EN_IC
12
DIA_EN
100V
S EL_IC
13
SEL
S NS _IC
11
SNS
GND_IC
GND
LATCH_IC
14
LATCH
ILIM1_IC
21
ILIM1
ILIM2_IC
20
ILIM2
PowerPad
ILIMD_IC/FLT2_IC
18
ILIMD
ILIMD_IC
R2
TP S 272C45A/D
19.6k
R3
0
J23
Ground Ne twork
3
ILIMD_IC
ILIMD_IC/FLT2_IC
2
FLT2_IC
1
961103-6804-AR
Configura tion for Ve r D
ILIM1_IC
R13
10.0k
ILIM1_CTL_BP 1
1
R17
10k
SLVUBV4A – DECEMBER 2020 – REVISED DECEMBER 2021
Submit Document Feedback
D1
BAS 21-7-F
1
3
TP2
J13
J21
5010
3
2
1
1
VOUT1
OUT1
2
961103-6804-AR
571-0500
OUT1
3
OUT1
D8
VOUT2
5
OUT2
S TPS1150A
6
OUT2
7
OUT2
C3
TP3
22nF
5010
100V
D2
S MCJ48A-TR
48V
GND
J20
TP11
571-0500
4
NC
5011
D9
22
NC
S TPS1150A
C6
25
22nF
100V
17
GND_IC
GND
D3
S MCJ48A-TR
48V
R5
R6
GND
0
48.7
J16
R8
1.0k
2
D5
1
BAS 21-7-F
C7
D6
961102-6404-AR
100V
SMAJ5.0CA
2.2uF
5V
TP4
TP5
TP6
GND
J7
J22
5011
5011
5011
571-0100
571-0100
Curre nt Limiting
R14
4.99k
J14
J15
Q1
Q2
2
ILIM1_CTL_BP 2
1
2N7002Q-7-F
2N7002Q-7-F
1
961102-6404-AR
961102-6404-AR
R18
10k
GND_IC
GND
Figure 4-1. TPS272C45EVM Schematic Drawing
Copyright © 2021 Texas Instruments Incorporated
3.3V LDO
U1
TP S 7A1633DGNR
8
3
IN
P G
5
1
EN
OUT
J8
J9
7
6
DELAY
NC
2
3
DNC
C2
C1
2
EN1_IC
100V
EP GND
2.2µF
1
1uF
50V
961103-6804-AR
961103-6804-AR
GND
J19
2
1
961102-6404-AR
R1
DIA_EN_IC
4.7k
R4
S EL_IC
4.7k
FLT_P U
R7
LATCH_IC
VDD_IC
4.7k
R9
1.0k
R10
FLT_IC/FLT1_IC
4.7k
R11
EN2_IC
TP 10
4.7k
R12
5126
EN1_IC
4.7k
TP 8
TP 9
5126
5126
Ana log S e ns ing
R15
S NS _BP
4.7k
C8
D7
100V
MMSZ5226B-7-F
100pF
2
3.3V
1
GND
TPS272C45EVM Schematic
Configura tion J umpe rs
J10
J11
J12
J17
3
3
3
3
2
EN2_IC
2
DIA_EN_IC
2
S EL_IC
2
LATCH_IC
1
1
1
1
961103-6804-AR
961103-6804-AR
961103-6804-AR
961103-6804-AR
GND
Boos te rP a ck He a de rs
J1/J3
BP _3V3
1
21
+3.3V
+5V
SNS _BP
2
22
Analog_In
GND
3
23
LP _UART_RX
Analog_In
4
24
LP _UART_TX
Analog_In
DIA_EN_BP
5
25
GP IO !
Analog_In
6
26
Analog In
Analog_In
7
27
S P I_CLK
Analog_In/I2S _WS
8
28
GP IO !
Analog_In/I2S _S CLK
9
29
I2C_S CL
Analog_Out/I2S _S Dout
10
30
I2C_S DA
Analog_Out/I2S _S Din
SSQ-110-03-T-D
J2/J4
11
31
GP IO !
GP IO !
ILIM1_CTL_BP 1
12
32
S P I_CS /GP IO !
GP IO !
ILIM1_CTL_BP 2
13
33
S P I_CS /GP IO !
GP IO !
14
34
S P I_MIS O
GP IO !
15
35
S P I_MOS I
Time r_Cap/GP IO !
16
36
RS T
Time r_Cap/GP IO !
17
37
GP IO
P WM/GP IO !
18
38
GP IO !
P WM/GP IO !
19
39
P WM/GP IO !
P WM/GP IO !
20
40
GND
P WM/GP IO !
SSQ-110-03-T-D
GND
TP 7
5126
S NS _IC
R16
1.00k
TPS272C45 Evaluation Module
3
J6
2
VDD_IC
1
BP _3V3
571-0500
J18
3
FLT_P U
2
BP _3V3
1
961103-6804-AR
GND
FLT_P U
R19
1.0k
R20
FLT2_IC
4.7k
TP 12
5126
5
Advertisement
Table of Contents
