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SECTION 2
2-1 RECEIVER CIRCUITS
2-1-1 RF CIRCUIT (RF UNIT)
Received signal enter the antenna connector (J3) and pass
through a band-pass filter (C4–C7, C11–C13, D3, D4, L1,
L2). The filtered signals are applied to an PRE-amplifier
(Q2).The RF signals are applied to a band-pass filter (C17,
C18, C23, C31, C36–C38, D5, D7, L6, L24), and applied to
an RF amplifier (Q3). The amplified signal passes through a
band-pass filter (C44–C47, C51–C53, D8, D9, L7, L9), and
then applied to the 1st mixer circuit.
2-1-2 1ST MIXER AND 1ST IF CIRCUITS (RF UNIT)
The 1st mixer circuit converts the received signals to a fixed
frequency of the 1st IF signal with a PLL output frequency.
By changing a PLL frequency, only the desired frequency
can be passed through a pair of crystal filters at the next
stage of the 1st mixer.
The filtered signals are applied to a 1st mixer (IC6, pin 4)
and are then mixed with a 1st LO signal from the PLL circuit
to produce a 30.875 MHz 1st IF signal.
The 30.875 MHz 1st IFsignal is applied to crystal band-pass
filter (FI1). FI1 is an MCF (Monolithic Crystal Filter) which
suppresses out-of-band signal. The 1st IF signal is applied
to the 2nd mixer circuit (IC5, pin 16) via the buffer amplifier
(Q8)
2-1-3 2ND IF AND DEMODULATOR CIRCUITS
(RF UNIT)
The 2nd mixer circuit converts the 1st IF signal to a 2nd IF
signal. A double superheterodyne system (which converts
receive signals twice improves the image rejection ratio and
obtains stable receiver gain.
The amplified signal is applied to a 2nd mixer (IC5, pin 16)
and is then mixed with a 2nd LO signal to produce a 455 kHz
2nd IF signal.
• 2nd IF AND DEMODULATOR CIRCUITS
R100
R83
"SQL.V" signal to the IC20,
pin 1 (LOGIC unit)
"DISC" signal to the
IC12, pin 2 (LOGIC unit)
CIRCUIT DESCRIPTION
C77
R81
8
R39
R85
Active
Noise
filter
amp.
C83
QUAD.
detector
9
10
R37
R83
C80
The 455 kHz 2nd IF signal is applied to a ceramic band-pass
filter (FI2) where unwanted signals are suppressed and then
to a limiter amplifier section in system IC (IC5, pin 5).
IC5 contains the local oscillator circuit, quadrature detector
circuit, noise filter circuit, IF amplifier, limiter amplifier, noise
amplifier, and so on. The local oscillator section and X1 gen-
erate 30.42 MHz for the 2nd LO signal.
The 2nd LO signal from the limiter amplifier (IC5, pin 5) is
applied to the quadrature detector section (IC5, pin 11 and
ceramic discriminator X2) to demodulate the 2nd IF signal
into an AF signal. The AF signal is output from pin 9 of IC5.
2-1-4 SQUELCH CIRCUIT (RF AND LOGIC UNITS)
A squelch circuit cuts out AF signals when no RF signal is
received. By detecting noise components in the AF signals,
the squelch circuit switches the AF mute switches.
The squelch switching signal from IC5, pin 13 is applied to
the [SQL] select switch (LOGIC unit; IC1, pin49). Thselects
squelch switch of R2 (on FRONT unit) or R91 (on LOGIC
unit) to set the squelch level by the [LOCAL INHIBIT] switch
(SW board; S1–3). The switch is selected to use IC20 (on
LOGIC unit).
If the [LOCAL INHIBIT] switch is "OFF", the squelch switch
is selected R2 (on LOGIC unit). And the [LOCAL INHIBIT]
switch is "ON", the squelch switch is selected R91 (on
FRONT unit).
2-1-5 AF AMPLIFIER CIRCUIT
(RX AND LOGIC UNITS)
The AF signal outputs from pin 9 of IC5 (RX unit) is applied
to pin 2 of IC12 (LOGIC unit), and then applied to pin 3 of
IC13 (LOGIC unit) which functions as a high-pass and low-
pass filter via a de-emphasis circuit. The filtered signal is
output from pin 7 of IC13 (LOGIC unit) and is the applied to
the [VOLUME] control (R1) on the FRONT PANEL through
an AF mute switch (LOGIC unit; Q10 and Q11). When the
squelch is closed, Q10 and Q11 cuts off the AF signal as an
AF mute switch. The AF signal is power-amplified at an AF
power amplifier (LOGIC unit; IC15) to drive a speaker.
3rd IF filter
455 kHz
C81
FI2
7
5
3
IF
amp.
Noise
comp.
11
12
C84
X2
2 - 1
X1
1
2nd
Mixer
IC2 TA31136F
13
16
2nd IF (19.65 MHz)
from Q8
"SQL.SW" signal to the IC1,
pin 49 (Logic unit)
"RSSI" signal to the J9,
pin 26 (Logic unit)
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