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Chapter 2
Technical Summary
The 56F827EVM is designed as a versatile hybrid controller development card for
developing real-time software and hardware products to support a new generation of
applications in digital and wireless messaging, digital answering machines, feature
phones, modems, and digital cameras. The power of the 16-bit 56F827 hybrid controller,
combined with the on-board 64K × 16-bit external program static RAM (SRAM),
64K × 16-bit external data SRAM, RS-232 interface, stereo 16-bit codec interface,
Daughter Card Expansion interface and parallel JTAG interface, makes the 56F827EVM
ideal for developing and implementing many audio and voice algorithms, as well as for
learning the architecture and instruction set of the 56F827 processor.
The main features of the 56F827EVM, with board and schematic reference designators
include:
• 56F827 16-bit +2.5V/+3.3V hybrid controller operating at 80MHz [U1]
• External fast static RAM (FSRAM) memory [U2], configured as:
— 64K×16 bits of program memory with 0 wait states at 70MHz
— 64K×16 bits of data memory with 0 wait states at 70MHz
• 1M-bit Serial EEPROM [U4]
• 4.00MHz crystal oscillator for hybrid controller frequency generation [Y1]
• Optional external oscillator frequency input connector [JG4 and JG5]
• Joint Test Action Group (JTAG) port interface connector for an external debug
Host Target Interface [J3]
• On-board Parallel JTAG Host Target Interface, with a connector for a PC printer
port cable [P2]
• RS-232 interface for easy connection to a host processor [U3 and P3]
• 16-bit stereo codec interface [U5, P4 and P5]
• Stereo headphone interface [U6 and P6]
• Codec sample rate selector [S4]
MOTOROLA
Freescale Semiconductor, Inc.
Technical Summary
For More Information On This Product,
Go to: www.freescale.com
2-1
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