Technical Summary - Motorola 56F8346 User Manual

Evaluation module
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Chapter 2

Technical Summary

The 56F8346EVM is designed as a versatile hybrid controller development card for
developing real-time software and hardware products to support a new generation of
applications in servo and motor control, digital and wireless messaging, digital answering
machines, feature phones, modems, and digital cameras. The power of the 16-bit
56F8346, combined with the on-board 128K × 16-bit external program/data static RAM
(SRAM), 128K × 16-bit external data/program SRAM, RS-232 interface, CAN interface,
Daughter Card Expansion interface and parallel JTAG interface, makes the 56F8346EVM
ideal for developing and implementing many motor controlling algorithms, as well as for
learning the architecture and instruction set of the 56F8346 processor.
The main features of the 56F8346EVM, with board and schematic reference designators
include:
• 56F8346FV60, a 16-bit +3.3V/+2.5V Digital Signal Processor operating at 60MHz
[U1]
• External fast static RAM (FSRAM) memory, configured as:
— 128K×16-bit of memory [U2] with 0 wait state at 60MHz via CS0
— 128K×16-bit of memory [U3] with 0 wait state at 60MHz via CS1/CS2
• 1-Wire Serial 64-Bit Unique ID [U6]
• Optional 4-Channel 10-bit Serial D/A, SPI for real-time user data display [U5]
• 8.00MHz crystal oscillator for hybrid controller frequency generation [Y1]
• Optional external oscillator frequency input connectors [JG1 and JG2]
• Joint Test Action Group (JTAG) port interface connector for an external debug
Host Target Interface [J3]
• On-board Parallel JTAG Host Target Interface, with a connector for a PC printer
port cable [P1], including a disable jumper [JG9]
• RS-232 interface for easy connection to a host processor [U4 and P2], with a
disable jumper [JG7]
• CAN interface for high speed, 1.0Mbps, FlexCAN communications [U16 and J5]
MOTOROLA
Freescale Semiconductor, Inc.
Technical Summary
For More Information On This Product,
Go to: www.freescale.com
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