AOC LCD Monitor P/N : 41A50-144 Service Manual

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SERVICE MANUAL

SPECTRUM Series
LCD Monitor
LM-700/LM-700A
P/N : 41A50-144

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Summary of Contents for AOC LCD Monitor P/N : 41A50-144

  • Page 1: Service Manual

    SERVICE MANUAL SPECTRUM Series LCD Monitor LM-700/LM-700A P/N : 41A50-144...
  • Page 2 THESE DOCUMENTS ARE FOR REPAIR SERVICE INFORMATION ONLY. EVERY REASONABLE EFFORT HAS BEEN MADE TO ENSURE THE ACCURACY OF THIS MANUAL; WE CANNOT GUARANTEE THE ACCURACY OF THIS INFORMATION AFTER THE DATE OF PUBLICATION AND DISCLAIMS RE LIABILITY FOR CHANGES, ERRORS OR OMISSIONS, MANUFACTURE DATA : JULY.
  • Page 3: Table Of Contents

    PAGE 1. SPECIFICATIONS ... GENERAL SPECIFICATIONS ...…... LCD MONITOR DESCRIPTION ... INTERFACE CONNECTOR ...……. 2. PRECAUTION AND NOTICES ... ASSEMBLY PRECAUTION ... OPERATIONG PRECAUTION ... STORAGE PRECAUTION …... HIGH VOLTAGE WARNING ... 3. OPERATING INSTRUCTIONS ... 4. ADJUSTMENT ... ADJUSTMENT CONDITIONS AND PRECAUTIONS ... ADJUSTMENTS METHOD .&...
  • Page 4: Specifications

    1. SPECIFICATIONS FOR LCD MONITOR General specifications LCD-PANEL : Active display area Pixel pitch Pixel format Display Color : 8-bit, 16.7 million colors External Controls : ● Power On/Off, Auto key, Left key, Right key ( for 4-key ) OSD menu Controls ●...
  • Page 5: Lcd Monitor Description

    LCD MONITOR DESCRIPTION The LCD MONITOR will contain an main board, an Inverter module, keyboard and External Adapter which house the flat panel control logic, brightness control logic, DDC and DC-DC conversion The Inverter module will drive the backlight of panel . The Adapter will provides the 12V DC-power 5 Amp to Main-board and Inverter module .
  • Page 6: Precaution And Notices

    ASSEMBLY PRECAUTION (1) Please do not press or scratch LCD panel surface with anything hard. And do not soil LCD panel surface by touching with bare hands (Polarizer film, surface of LCD panel is easy to be flawed) In the LCD panel, the gap between two glass plates is kept perfectly even to maintain display characteristic and reliability.
  • Page 7: Operating Instructions

    3. OPERATING INSTRUCTIONS This procedure gives you instructions for installing and using the LM700 LCD monitor display. Position the display on the desired operation and plug–in the power cord into External Adapter AC outlet. Three-wire power cord must be shielded and is provided as a safety precaution as it connects the chassis and cabinet to the electrical conduct ground.
  • Page 8: Adjustment

    ADJUSTMENT CONDITIONS AND PRECAUTIONS Adjustments should be undertaken only on following function : contrast, brightness focus, clock, h-position, v-position, red, green, blue since 6500 color & 7800 color. ADJUSTMENT METHOD Press MENU button to activate OSD Menu or make a confirmation on desired function, Press Left/Right button to select the function or done the adjustment.
  • Page 9 adjust the GREEN on OSD, until chroma 7120 indicator reached G=100 adjust the BLUE on OSD, until chroma 7120 indicator reached B=100 repeat above procedure ( item 8,9,10) until chroma 7120 RGB value meet the tolence =100±2 switch the chroma-7120 to xyY mode With press “MODE” button Adjust the Contrast on OSD window until the Y measurement on chroma 7120 reached the value Y= 180 cd/m Press 78 on OSD window to save the adjustment result...
  • Page 10: Front Panel Control Knobs

    2. Clock adjustment Set the Chroma at pattern 63 (cross-talk pattern) or WIN98/95 shut-down mode (dot-pattern). Adjust until the vertical-Stripe-shadow as wide as possible or no visible. This function is adjust the PLL divider of ADC to generate an accurate pixel clock Example : Hsyn = 31.5KHz The Divider number is (N) = (Pixel freq.
  • Page 11: Circuit & Software Description

    SPECIAL FUNCTION with PRESS-KEY A). press Menu button during 2 seconds along with plug-in the DC Power cord: That operation will set the monitor into “Factory- mode”, in Factory mode we can do the White balance adjustment with RS232 , and view the Backlight counter (this counter is use to record the panel activate hours ,for convenient the maintainer to check the panel backlight life time) In Factory mode, OSD-screen will locate in left top of screen.
  • Page 12: Simple Introduction About Lm500 Chipset

    SIMPLE-INTRODUCTION about LM700 chipset 1. GMZAN1 ( all-in-one chip solution for ADC, OSD, scalar and interpolation) : USE for computer graphics images to convert analog RGB data to digital data with interpolation process, zooming, generated the OSD font , perform overlay function and generate drive-timing for LCD-PANEL. 2.
  • Page 13 Input analog RGB & H,V,& ddc signal & Rs232 communication GMZAN1 (U200) DDC-chip Oscillator 50 mhz MCU ( U302 ) DC 12V 5Amp Keyboard module EXTERNAL- ADAPTER Main-board Block diagram Data Digital RGB Panel Control Signal: Dhs, Dvs, Dclk Communication signal: Hclk,Hfs,Hdata0 Panel-Power Control (U202)
  • Page 14: Software Flow-Chart

    SOFTWARE FLOW CHART Power-On Subrotine CHART POWER-ON START Initial MCU I/O, Interrupt vector & Ram Check Eeprom is empty ? Check White-balance data(6500 & 7800) same with the backup data ? Check POC( backlight counter) data same with the backup data ? IF not same, overwrite the data with backup value.
  • Page 15 MAIN SUBROTINE LOOP Main loop start Process Power-saving status ( according to below flow-chart result) Check GMZAN IFM status .is change or not. And check Signal cable status ( cable not connected or not ) ** IFM is the register which measured the HSYN & Vsyn status Yes, IFM have change Is current system status in Power-saving ? Check the IFM result is in the standard...
  • Page 16: A). Interface-Board Trouble Shooting Chart

    6. A). Interface-Board Trouble-Shooting chart *Use the PC Win 98 white pattern, with some icon on it, and Change the Resolution to 640x480 60 Hz / 31 KHz **NOTICE : The free-running freq. of our system is 48 KHz / 60 Hz, so we recommend to use another resolution to do trouble shooting, this trouble shooting is proceed with 640x480 @60Hz 31Khz NO SCREEN APPEAR Measured Input DC-voltage ( J1)= 12 V?
  • Page 17 PANEL-POWER CIRCUIT check R225 should have response from 12V to 0V When we switch the power switch from on to off OK,R225 have response Measured the U202 pin 5,6,7,8= 5 V? NVERTER Control Relative Circuit Measured the inveter connector CN303 Pin 1=12V, pin 3 on/off control=5V (on) NG, still no screen Replace INVERTER to new-one, and...
  • Page 18 II (a) THE SCREEN is Abnormal , stuck at white screen, OSD window can’t appear, but keyboard & LED was normal operation. At general, this symtom is cause by missing panel data or panel power, so we must check our wire-harness which connected to panel or the panel power controller (U202) Check if the Wire harness from CN601 &...
  • Page 19 KEYBOARD BLOCK check Check U302 MCU pin 43,42,41,40,39 at High state(5V)? without press any key Press power key and check U302 pin 43 = low (0V) ? Check U302 pin 38 (LED green) will have transition from hi to low or low to hi when we press the power key?? NG, MCU no response Check U302 pin 20= 20MHz ? and pin 44...
  • Page 20 POWER-BLOCK check *Note : the Waveform of U304 pin 2 can determined the power situation 1. stable rectangle waveform with equal duty, freq around 150K-158KHz that means all power of this interface board is in normal operation ,and all status of 5V & 3.3V is working well 2.
  • Page 21 III.ALL SCREEN HAS INTERFERENCES OR NOISE, CAN’T BE FIXED BY AUTO KEY ** NOTE: There is so many kind of interferences, 1). One is cause by some VGA-CARD that not meet VESA spec or power grounding too bad that influence our circuit 2).other is cause by external interferences, move the monitor far from electronic equipment.( rarely happened) Use DOT-pattern, or win98/99 shut-down...
  • Page 22 There is an interferences in DOS MODE NOTE :the criteria of doing AUTO-CONFIGURATION : must be a full-size screen, if the screen not full , the auto- configuration will fail. So in dos mode ,just set your “CLOCK” in OSD-MENU to zero or use some EDITOR software which can full fill the whole screen (ex: PE2, HE) and then press “AUTO”...
  • Page 23: B). Inverter - Module Trouble Shooting Chart

    MODEL NO. : SM04(4.0)B-BHS-1-TB SYMBOL HV OUTPUT Input H.V to lamps HV OUTPUT Input H.V to lamps N.C. RETURN CORPORATION L0037 ,AOC PART NO.: 79AL17-1-S DESCRIPTION Input voltage: 12V Input voltage: 12V ON: 3V OFF:0V Dimming range (0V~+5.0V) DESCRIPTION N.C.
  • Page 24: Chi-Mei-Inverter Spec & Trouble Shooting Chart

    S A M P O C O R P O R A T I O N TROUBLE SHOOTING OF CHI-MEI INVERTER ( DIVTL0037-D42- -) 5.FUNCTION SPECIFICATIONS: The data test with the set of SAMPO, and the test circuit is as below. SYMBOL ITEM Input voltage...
  • Page 25 S A M P O C O R P O R A T I O N TROUBLE SHOOTING OF CHI-MEI INVERTER ( DIVTL0037-D42- -) 7.CIRCUIT DIAGRAM:...
  • Page 26: Part List

    S A M P O C O R P O R A T I O N TROUBLE SHOOTING OF CHI-MEI INVERTER ( DIVTL0037-D42- -) 8.PART LIST 8-1 COMPONENTS LIST: REF. PART NAME PART NUMBER CON1 CONNECTOR VCNCP0015-EJSTA 〃 CON2,3 VCNCP0014-PJSTA VCNCP0014-ZGLEA R1,2 RESISTOR...
  • Page 27 S A M P O C O R P O R A T I O N TROUBLE SHOOTING OF CHI-MEI INVERTER ( DIVTL0037-D42- -) 8-2 COMPONENTS LIST: REF. PART NAME 〃 VCLRCN1HB102K-A 〃 C10,11 VCLRCN1EB333K-A 〃 C12,13 VCMEBF2AB184J-P VCMECF2AC184J-P C14,15,19, CAPACITOR VCDSEU3SL220K-- 〃...
  • Page 28: Trouble Shooting

    S A M P O C O R P O R A T I O N TROUBLE SHOOTING OF CHI-MEI INVERTER ( DIVTL0037-D42- -) 9. TROUBLE SHOOTING 9-1 NO POWER: CHECK ON FUSE F1 Vin=12 TO CHECK ON Q4&Q6 PASS Vout = 9V TO CHECK ON L1&L2 PASS...
  • Page 29 S A M P O C O R P O R A T I O N TROUBLE SHOOTING OF CHI-MEI INVERTER ( DIVTL0037-D42- -) 9-2 HIGHT VOLTAGE PROTECTION: 1. SHORT R30 OPEN LOAD 2. TEST C14 INPUT POINT VOLTAGE Vh=1600 ±100V rms 9-3 OUTPUT CURRENT ABNORMALITY: 1 CHECK ON C6 FREQUNCY &CHIP&IC CPIP...
  • Page 30 S A M P O C O R P O R A T I O N TROUBLE SHOOTING OF CHI-MEI INVERTER ( DIVTL0037-D42- -) 9-4. ENBALE ABNORMALITY: IF ENBALE ABNORMALITY 1. TO CHECK IC PIN 9 TURN NO HAVE 12 VOLTAGES PASS 9-5 DIMMING CONTROL ABNORMALITY: IF DIMMING ABNORMALITY TO...
  • Page 31 S A M P O C O R P O R A T I O N TROUBLE SHOOTING OF CHI-MEI INVERTER ( DIVTL0037-D42- -) 9-6 TRANSFORMER ABNORMALITY: IF TRANSFORMER ABNORMALITY TO CHECK C3&C4 CHIP OUTLINE OR TRANSFORMER 10. INSTRUMENTS FOR TEST: 1.
  • Page 32 6 C). ADAPTER-MODULE Trouble shooting chart The following spec & block-diagram is offer by CHI-SAM –COMPANY, for External Adapter part number : 80AL17-1-CH ( Black), 80AL17-2-CH ( White) AC ADAPTER CH-1205 TROUBLE SHOOTING NO VOLTAGE O/P CHECK BD101 AC VOLT. I/P OK ? CHECK BD101 DC VOLT.
  • Page 33 I.) Adapter Schematic CH-1205 Please see the ADAPTER-SCHEMATIC in the end of this Document ( page 75)
  • Page 34 IV. ADAPTER BOM LIST ( PART no. 80AL15-2-LI) Item Reference BD101 CN101 BEAD1,BEAD2,BEAD3,BEAD4 C116 C105 C107,C108,C109, C121,C122,C123 C112 C113 C110,C111 10 C114 11 C117,C118 12 C104 13 C106 14 C119 15 C103 16 C124 17 C101,C102,C115 18 L103 19 D104,D105,D108,D109 20 D102,D103 21 D106,D107 22 D101...
  • Page 35 41 PCB 42 R117 43 J109,J110 44 R143 45 R114 46 R124,R127 47 R136 48 R145 49 R128 50 R115 51 R123 52 R107,R108,R109,R110 53 R142 54 R130,R131,R132, R133 55 R141 56 R129 57 R137 58 R139 59 R105,R106 60 R104,R116 61 R118,R144,R120,R134 62 R102,R103 63 R122...
  • Page 36 86 FOR FRONT HEATSINK 87 FOR FRONT HEATSINK 98 FOR D106,D107 導熱墊片 TCR- 05 15*25-ASAHI 導熱墊片 TCR- 10 10*20-ASAHI 3M擋牆膠帶#44 1L 35*40mm FRONT COVER 129.3*63.8*19.34mm BASE COVER 129.3*63.8*18.7mm DC OUTPUT POWER CABLE UL1185#18AWG ψ5.5*ψ2.5 *20.5,(音叉&車溝,黑),L=80CM FRONT HEATSINK FOR CH-1205 BOTTOM HEATSINK FOR CH-1205 REV:C FRPP FOR CH-1205 BOTTOM HEATSINK LED HOLDER 5*10 RATING FOR 捷聯...
  • Page 37 6 D). AUDIO-MODULE Trouble shooting chart I.) NO VOICE OUTPUT Plug-out the DC power , make sure the monitor is in OFF status . Use OHM-METER measure U1 pin 2, 4 (channel-A ) is speaker well connected? Measure U1 pin 10,12 ( channel B) is speaker well connected ? Plug-in the DC power, set the monitor ON status .
  • Page 38 II.) SOUND DISTORTION Check U1 pin 2, 4 10, 12 is the voltage output = VCC / 2 . ? CHECK SPEAKER AUDIO BOM Bill Of Materials September 7,2001 Item Quantity Reference Part ______________________________________________ C1,C2,C4 1uF C6,C7 J1,J3 VR1,R1,R2 10K R5,R6 R9,R8 R11,R10...
  • Page 39: Input Format

    The gmZAN1device utilizes Genesis’ patented third-generation Advanced Image Magnification technology as well as a proven integrated ADC/PLL to provide excellent image quality within a cost effective SVGA/XGA LCD monitor solution. As a pin-compatible replacement for the gmB120, the gmZAN1 incorporates all of the gmB120 features plus many enhanced features;...
  • Page 40: Pin Description

    1.3 Pin Description Unless otherwise stated, unused input pins must be tied to ground, and unused output pins left open. PIN # Name I/O Description ADC_VDD2 ADC_GND2 ADC_VDD1 ADC_GND1 SUB_GNDA ADC_GNDA ADC_VDDA Reserved ADC_BGNDA ADC_BVDDA BLUE- BLUE+ ADC_GGNDA ADC_GVDDA GREEN- GREEN+ ADC_RGNDA ADC_RVDDA...
  • Page 41 Table 2 : Host Interface (HIF) / External On-Screen Display PIN # Name I/O Description HCLK HDATA RESETn OSD-HREF OSD-VREF OSD-Clk OSD-Data0 OSD-Data1 OSD-Data2 OSD-Data3 OSD-FSW MFB11 MFB10 MFB9 MFB8 MFB7 MFB6 MFB5 MFB4 MFB3 FMB2 MFB1 MFB0 Host Frame Sync. Frames the packet on the serial channel. Clock signal input for the 3-wire serial communication.
  • Page 42 Table 3 : Clock Recovery / Time Base Conversion PIN # Name I/O Description DVDD DAC_DGNDA DAC_DVDDA PLL_DVDDA Reserved PLL_DGNDA SUB_DGNDA SUB_SGNDA PLL_SGNDA Reserved PLL_SVDDA DAC_SVDDA DAC_SGNDA SVDD TCLK XTAL PLL_RVDDA PLL_RGNDA Reserved SUB_RGNDA VSYNC SYN_VDD HSYNC/CSYNC Digital power for Destination DDS (direct digital synthesizer). Must be bypassed with a 0.1uF capacitor to digital ground plane.
  • Page 43 PIN # Name PD47 PD46 PD45 PD44 PD43 PD42 PD41 PD40 PD39 PD38 PD37 PD36 PD35 PD34 PD33 PD32 PD31 PD30 PD29 PD28 PD27 PD26 PD25 PD24 PD23 PD22 PD21 PD20 PD19 PD18 PD17 PD16 PD15 PD14 PD13 PD12 PD11 PD10 Table 4.
  • Page 44 PIN # Name PdispE PCLKA PCLKB Pbias Ppwr PIN # Name PSCAN SCAN_IN1 SCAN_IN2 SCAN_OUT1 SCAN_OUT2 Reserved Reserved Table 6. VDD / VSS for Core Circuitry, Host Interface, and Panel/Memory Interface PIN # 65, 40, 33, 12 149, 108, 58, 21, 11 158, 151, 140, 126, 114, 72, 61, 49, 41, 30, 18, 8, 1 Description...
  • Page 45 1.4 System-level Block Diagram ADC_VDD ADC_GND Blue Green RVDDA Hsync Vsync R+,G+,B+ On-Screen OSD-FSW OSD-FSW Display OSD-CLK Controller OSD-HREF OSD-VREF MPU with HCLK EPROM HDATA MFBs RESETn Figure 2. Typical Stand-alone Configuration CVDD gmZAN1 Core To Clock Generator CVSS RVDDA RGNDA TCLK SVDDA...
  • Page 46: Operating Modes

    1.5 Operating Modes The Source Clock (also called SCLK in this document) and the Panel Clock are defined as follows: The Source Clock is the sample clock regenerated from the input Hsync timing (called clock recovery) by SCLK DDS (direct digital synthesis) and the PLL. The Panel Clock is the timing clock for panel data at the single pixel per clock rate.
  • Page 47 1.5.4 Downscaling Panel Clock frequency < Source Clock frequency Panel Hsync frequency < Input Hsync frequency Panel Vsync frequency = Input Vsync frequency This mode is used when the input resolution is greater than the panel resolution, to provide enough of a display to enable the user to recover to a supported resolution.
  • Page 48: Functional Description

    Figure 3 below shows the main functional blocks inside the gmZAN1 2.1 Overall Architecture Analog Triple Host Interface 2.2 Clock Recovery Circuit The gmZAN1 has a built-in clock recovery circuit. This circuit consists of a digital clock synthesizer and an analog PLL.
  • Page 49 The SCLK frequency (1/SCLK period) can be set to the range of 10-to-135 MHz. Using the DDS (direct digital synthesis) technology the clock recovery circuit can generate any SCLK clock frequency within this range. The pixel clock (DCLK or destination clock) is used to drive a panel when the panel clock is different from SCLK (or SCLK/2).
  • Page 50 The table below summarizes the characteristics of the clock recovery circuit. SCLK Frequency Sampling Phase Adjustment Patented digital clock synthesis technology makes the gmZAN1 clock circuits very immune to temperature/voltage drift. 2.2.1 Sampling Phase Adjustment The ADC sampling phase is adjusted by delaying the Hsync input at the programmable delay cell inside the gmZAN1. The delay value can be adjusted in 64 steps, 0.5 ns/step.
  • Page 51: C). Adapter Trouble Shooting Chart & Bom

    2.3 Analog-to-Digital Converter 2.3.1 Pin Connection The RGB signals are to be connected to the gmZAN1 chip as described in Table 8 and Table 9. Table 8. Pin Connection for RGB Input with Hsync/Vsync GmZAN1 Pin Name (Pin Number) Red+(#95) Red- (#94) Green+(#91) Green- (#90)
  • Page 52 2.3.2 Sync. Signal Support The gmZAN1 chip supports digital separate sync (Hsync/Vsync), digital composite sync, and analog composite sync (also known as sync-on-green). All sync types are supported without external sync separation / extraction circuits. Digital Composite Sync The types of digital composite sync inputs supported are: OR/AND type: No Csync pulses toggling during the vertical sync period XOR type: Csync polarity changes during the vertical sync period The gmZan1 provides enough sync status information for the firmware to detect the digital composite sync type.
  • Page 53 The display start/end registers store the first and the last pixels/lines of the last frame that have RGB data above a programmed threshold. The reference point of the STM block is the same as that of the source timing generator (STG) block: The first pixel: the pixel whose SCLK rising edge sees the transition of the HSYNC polarity from low to high.
  • Page 54 2.5.1 Scaling Filter The gmZAN1 scaling filter uses an advanced adaptive scaling technique proprietary to Genesis Microchip Inc. and provides high quality scaling of real time video and graphics images. This is Genesis’ third generation scaling technology that benefits from the expertise and feedback gained by supporting a wide range of solutions and applications.
  • Page 55 Signal Name Period Frequency Front porch Back porch Pulse width PdispE Disp. Start from VS t6 PVS set up tp PHS PVS hold from PHS t19 Period Front porch Back porch Pulse width PdispE Disp. Start fom HS PCLKA, Frequency PCLKB*4 Clock (H) *2 Clock (L) *2...
  • Page 56 Figure 7. timing Diagrams of the TFT Panel Interface (One pixel per clock) (a) Vertical size in TFT (b) Vsync width and display position in TFT RGBs (c) Horizontal size in TFT PCLK RGB data from data paths (d) Hsync width in TFT Panel Background Color Displayed...
  • Page 57: Power Manager

    Figure 8. Data latch timing of the TFT Panel Interface (a) Two pixel per clock mode in TFT PCLK R0,(N:0) G0,(N:0) B0,(N:0) R1,(N:0) G1,(N:0) B1,(N:0) (b) One pixel per clock mode in TFT PCLK R(n:0) G(n:0) B(n:0) 2.6.2 Power Manager LCD panels require logic power, panel bias power, and control signals to be sequenced in a specific order, otherwise severe damage may occur and disable the panel permanently.
  • Page 58 2.6.2.1 State 0 (Power Off) The Pbias signal and Ppower signal are low (inactive). The panel controls and data are forced low. This is the final state in the power down sequence. PM is kept in state 0 until the panel is enabled. 2.6.2.2 State 1 (Power On) Intermediate step 1.
  • Page 59: Host Interface

    2.6.3 Panel Interface Drive Strength As mentioned previously, the gmZAN1 has programmable output pads for the TFT panel interface. Three groups of panel interface pads (panel clock, data, and control) are independently controllable and are programmed using API calls. See the API reference manual for details. Value (4 bits) 10,11,12,13,14,15 2.7 Host Interface...
  • Page 60 2.7.1 Serial Communication Protocol In the serial communication between the microcontroller and the gmZAN1, the microcontroller always acts as an initiator while the gmZAN1 is always the target. The following timing diagram describes the protocol of the serial channel of the gmZAN1 chip. Figure 10.
  • Page 61 Table 15 summarizes the serial channel specification of the gmZAN1. Refer to Figure 10 for the timing parameter definition. Parameter Word Size (Instruction and Data) HCLK low to HFS high (t1) HFS low to HCLK inactive (t2) HDATA Write to Read Turnaround Time (t3) 1 HCLK cycle HCLK cycle (t4) Data in setup time (t5) Data in hold time (t6)
  • Page 62 2.8.1 OSD Color Map Both the internal and external OSD display use a 16 location SRAM block for the color programming. Each color location is a twelve-bit value that defines the upper four bits of each of the 8 bit Red, Blue and Green color components as follows: D3:0 Blue;...
  • Page 63 To improve the appearance and make it easy to find the OSD window on the screen, the user may select optional shadowing (3D effect). The “Shadow” feature operates in the same manner as in the B120; that is, it produces a region of half intensity (scaler data) pixels of the same width and height as the OSD window, but offset to the right and down by 8 pixels/lines (the border width setting has no effect).
  • Page 64: Electrical Characteristics

    3. ELECTRICAL CHARACTERISTICS Parameter PVDD CVDD Operating temperature Storage temperature Maximum power consumption Parameter PVDD CVDD Vil (COMS inputs) Vil (TTL inputs) Vih (COMS inputs) Vih (TTL inputs) Input Current PVDD operating supply current CVDD operating supply current NOTE 1:5V-Tolerent TTL Input pads are as follows: CRT Interface: HSYNC (pin #150), VSYNC (#148) Host Interface: HFS (#98), HCLK (#103), HDATA (#99), RESETN (#100), MFB[11:0]: MFB11 (#123), MFB10 (#124), MFB9 (#102), MFB8 (#104), MFB7 (#105), MFB6 (#106), MFB5 (#107), MFB4 (#109),...
  • Page 65: Mechanical Of Cabinet Front Dis-Assembly

    MECHANICAL OF CABINET FRONT DIS-ASSEMBLY For temporary, this page still not available. Wait for mechanical drawing !
  • Page 66: Parts Listing

    GND. CLAMP LCD BAR-CODE POWER LED LENS POWER KEY PAD CABLE COVER AUDIO POWER BUTTON VOLUME KNOB SCREW COVER FRONT PANEL (AOC) BACK COVER SUPPORT FRONT (AUDIO) SUPPORT BACK BASE ARM COVER LCD HINGE ID LABEL ( LM-700A) OWNERS MANUAL...
  • Page 67 PARTS LIST OF CABINET ( continue) LOCATION 750A T780KMGHBAA0A 1030 10128 1030 12128 1030 12128 170 3 SPECIFICATION SCREW SCREW 3X12mm SCREW 3X12mm LCD-PANEL M170E1-01 BY CHI-MEI...
  • Page 68 PARTS LIST OF CONVERSION BOARD LOCATION CN303 33A 3802- CN302 33A 3802- CN602 33A 3802- CN601 33A 3802- R319 33A 8009- JP201 33A 8009- JP303 33A 8009- 33A 8810- CN200 33A 8013- 44A 3231- U302 56A 1125- C307 C309 C310 C312 C927 C928...
  • Page 69 LOCATION U601 U602 U200 U304 U305 U202 U904 U904 U401 U401 U203 56A 1133- U300 56A 1133- U300 56A 1133- Q200 Q304 D303 D303 RP300 L207 61A 0603- R200 61A 0603- R201 61A 0603- R202 61A 0603- R203 61A 0603- R207 61A 0603- R208...
  • Page 70 LOCATION C616 65A 0603- C201 65A 0603- C202 65A 0603- C204 65A 0603- C205 65A 0603- C207 65A 0603- C208 65A 0603- C209 65A 0603- C210 65A 0603- C211 65A 0603- C212 65A 0603- C213 65A 0603- C215 65A 0603- C217 65A 0603- C218...
  • Page 71 LOCATION C603 C943 C313 C314 L200 L201 L202 L203 L300 L900 L601 L602 L603 L604 R215 L601 L602 L603 L604 R215 MTG U3 D200 D201 D208 D209 D210 D200 D201 D208 D209 D210 D200 D201 D208 D209 D210 D300 D300 D300 D202 D203...
  • Page 72 LOCATION TP101 TP102 Q101 Q102 R101 R102 R103 R104 R105 R106 R107 R108 C101 LED1 J101 715A PARTS LIST OF KEY PC BOARD Quantity KEPC780EK 3252 PP T PP T 6021 0352 T 6021 0352 T 6021 0352 T 6021 0352 T 6021 0352 T...
  • Page 73 PARTS LIST OF DC-POWER BOARD LOCATION P3-1 715A LOCATION J003 J004 715A DCPC780A3 Quantity 3278 3278 331 6 27 A PARTS LIST OF AUDIO BOARD AUPC780A1 Quantity 3278 3278 8009 12E H 103 5 103 5 333 5 681 5 683 5 61A 153M 109 5...
  • Page 74: Power System And Consumption Current

    POWER SYSTEM AND CONSUMPTION CURRENT ADAPTER MODULE Input AC 110V, 60Hz/240V, 50Hz Output DC 12V 5A Main board power system LM2596S-5, 12V to 5V (5A SPEC) To CPU, Eeprom, 24c21, control-inverter-on.off 860mA when Cable not Connected 841mA when Normal operation To Chi-Mei Panel around 1250mA AIC1084, 5V to 3.3V (5A SPEC) 3.3V...
  • Page 75: Pcb Layout

    DDC chip Input Connector AIC1084 5V to 3.3v LM2596 convert 12V to 5V PCB LAYOUT Gmzan1 Keyboard-connector LVDS power ( LT1117) Panel- Power Control VR adjust for Lamp Luminance Inverter-connector LVDS...
  • Page 76: Mainboard Schematic Diagram

    PCLK HCLK /VGA_CON PDISPE RST1 .Gmzan1 block ZAN1 Title Size Date: LVDS block PAGE 6 ERED EGRN EBLU ORED OGRN OBLU PCLK PDISPE LVDS AOC (Top Victory) Electronics Co., Ltd. TOP LEVEL Document Number 763-17.DSN Monday, December 11, 2000 Sheet...
  • Page 77 SCAN_OUT2 R234 R233 C942 R224 0.1 uF ADC-AGND PGND R223 PPWR Q200 MMBT3904 10 K C620 10uF AOC (Top Victory) Electronics Co., Ltd. Title Size Date: DVDDA C200 C201 C202 100uF 0.1 uF 0.1 uF PGND SVDDA C203 C204 C205 100uF 0.1 uF...
  • Page 78 TXCK-O LVDS-EN TXO7 TXCK+O TXO8 TX3-O TXO9 TX3+O AVDD_3.3 U904 LT1117 C927 C939 0.1uF 330uF AOC (Top Victory) Electronics Co., Ltd. Title LVDS Size Document Number 715A820-1 Custom Date: Tuesday, July 10, 2001 CN601 EVEN HEADER 14 CN602 CON10 AVDD_3.3...
  • Page 79 10 K CN302 HEADER 9 CP301 CP302 1000 pF 1000 pF CN303 R403 HEADER 5 4.7K(OP) R402 BKLT-PWM C401 1K(OP) 100uF(OP) AOC (Top Victory) Electronics Co., Ltd. Title MICRO CONTROLLER Size Document Number 715A820-1 Date: Tuesday, July 10, 2001 Sheet...
  • Page 80: Power Block

    (600) C312 330 uF/35V TP705 TP706 Title Size Date: R905 R904 0(OP) T300 R902 3K(OP) 33 uH C309 330 uF/35V R903 1K(OP) AOC (Top Victory) Electronics Co., Ltd. POWER Document Number 715A820-1 Tuesday, July 10, 2001 Sheet C941 0.1 uF...
  • Page 81 12.) ADAPTER SCHEMATIC CH-1205 R101 CN101 F101 NTCR 3/5A L101 R102 L102 AC SOCKET 2A/250V 470K 1/4W 18mH C101 CY 2200P/250V VAR101 471KD07 C102 C103 R103 CY 2200P/250V CX 0.47U/300V 470K 1/4W C124 CY 1000P/250V Q103 R104 C2412K 4.7K 1/4W C123 0.1U R116...
  • Page 82: Audio Schematic Diagram

    13.AUDIO SCHEMATIC DIAGRAM U1 AN7522 2200uF/25V 10uF/50V 0.047uF 1(3W) 1(3W) 0.047uF 130K 100uF/25V C1,C2,C4 --- 1uF/50V CON2 EAR PHONE 100uF/16V CON2 AUDIO IN SW SPST Title LM700A Audio 1.5W X2 Size Document Number <Doc> Date: Friday, April 27, 2001 Sheet DC IN <RevCode>...

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