AOC LCD Monitor P/N : 41A50-144 Service Manual page 45

1.4 System-level Block Diagram
ADC_VDD
ADC_GND
R1 R1 R1
R R R
L1
RVDDA
L2
On-Screen
Display
Controller
MPU with
EPROM
MFBs
RESETn
Red
Blue
Green
R1 R1
R R
Hsync
To Clock
Vsync
Generator
C1 C2
C C
R+,G+,B+
4
OSD-FSW OSD-FSW
OSD-CLK
OSD-HREF
OSD-VREF
IRQ
HES
HCLK
HDATA
12
Figure 2. Typical Stand-alone Configuration
CVDD
gmZAN1 Core
CVSS
44
RVDDA
RGNDA
TCLK
OSC
SVDDA
SGNDA
DVDDA
DGNDA
Even Data
24
PCLKA
PHS
PVS
PDISPE
Odd Data
24
+12V
Pbias
Power Power
Switching Switching
Pbias
Module Module
+5/3.3V