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FPC 8084 User s Manual
A.2.3
Advanced Chipset Features
Since the features in this section are related to the chipset on the
CPU board and are completely optimized, changing the default
settings in this setup table are not recommended unless the user is
well oriented with the chipset features.
Phoe nix – Award BIOS CMOS Setup Utility
Advanced Chipset Features
DRAM Timing By SPD
X DRAM Clock
X SDRAM Cycle Length
X Bank Interleave
Memory Hole
P2C/C2P Concurrency
System BIOS Cacheable
Video RAM Cacheable
Frame Buffer Size
Aperture Size
AGP-4X Mode
AGP Driving Control
Driving Value
OnChip USB
USB Keyboard Support
OnChip Sound
OnChip Modem
CPU to PCI Write Buffer
PCI Dynamic Bursting
PCI Master 0 WS Write
PCI Delay Transaction
PCI# 2 Access # 1 Retry
AGP Master 1 WS Write
AGP Master 1 WS Read
Ç ÈÆÅ : M ov e
Ente r: Select
F5: Previ ous V alue s F 6: F ail-Safe Defa ults F7 : Opti mized Defa ults
46
Enabled
Host CLK
3
Disabled
Disabled
Enabled
Disabled
Disabled
16MAGP
64M
Enabled
AutoAGP
DA
Enabled
Disabled
Auto
Disabled
Enabled
Enabled
Enabled
Disabled
Enabled
Disabled
Disabled
+/-/P U/PD: Va lue
F10: Save
Gene ral Help
Item Help
Menu Level f
ES C: Exit F 1:
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