5-7. Ic Pin Function Description - Sony XR-L240 Service Manual

5-7. IC PIN FUNCTION DESCRIPTION

• MAIN BOARD IC1 MN101C49KTL (SYSTEM CONTROLLER)
Pin No. Pin Name
1 VREF –
2
VSM
3 to 6
NC
7 NOISE-DET
8 MPTH
9
NC
10 VREF +
11 VDD
12 OSC2
13 OSC1
14
VSS
15 XI
16 XO
17 GND (MMOD)
18 LCD-SO (TX)
19 LCD-SI (RX)
20 LCD-CKO
21 TU-SDA
22 TU-SI
23 TU-SCL
24 LCD-RES
25 LCD-CE
26 KEYACK
27 DAVN-RDS
28 B/U-IN
29
NC
30 RAM BU
31 TEST-IN
32
NCI
33 RESET
34 TU-ENABLE
35
BEEP
36 POWER-ON
37 ILL-IN
38 ACC-IN
39 NC
40
TEL-MUTE
41 NCI
42 UNI-SO
43 UNI-SI
44 UNI-CKO
45 SDA
All manuals and user guides at all-guides.com
I/O
—
Reference voltage (0V) terminal (for A/D converter)
I FM and AM signal meter voltage detection input from the FM/AM tuner unit (A/D input)
—
Not used
I
Noise level detection signal input at SEEK mode (A/D input)
I Multi-path detection signal input from the RDS decoder
—
Not used
— Reference voltage (+5V) terminal (for A/D converter)
—
Power supply terminal (+5V)
O Main system clock output terminal (18.432MHz)
I Main system clock input terminal (18.432MHz)
—
Ground terminal
I
Sub system clock input terminal (32.768kHz)
O Sub system clock output terminal (32.768kHz)
—
Setting terminal for the single chip mode
O
LCD serial data output to the liquid crystal display driver
I
LCD serial data input from the liquid crystal display driver
O LCD serial transfer clock signal output to the liquid crystal display driver
O
Serial data output to the FM/AM tuner unit
I
Serial data input from the FM/AM tuner unit
O Serial data transfer clock signal output to the FM/AM tuner unit
O
LCD reset signal output to the liquid crystal display driver "L": reset
O
Chip enable signal output to the liquid crystal display driver "H" active
I Key acknowledge signal detect input from the liquid crystal display driver
I
RDS data request signal input from the RDS decoder "H" active
I Battery detect signal input from the battery detect circuit "L" is input at low voltage
—
Not used
Internal RAM reset detection signal input terminal
I
Input terminal to check that RAM data are not destroyed due to low voltage
This checking is made within 100 msec after reset
I Setting terminal for the test mode "L": test mode Normally: fixed at "H"
I
Not used
System reset signal input from the reset signal generator or reset switch "L": reset
I
"L" is input for several 100 msec after power on, then it changes to "H"
O
Chip enable signal output to the FM/AM tuner unit "H" active
O Beep sound drive signal output to the power amp
O Main system power supply on/off control signal output terminal "H": power on
I Not used
I Accessory detect signal input terminal "L": accessory on
— Not used (open)
Telephone muting signal input terminal At input of "H", the signal is attenuated by –20 dB
I
Not used
I Not used
O Serial data output to the bus interface Not used
I Serial data input from the bus interface Not used
O Serial data transfer clock signal output to the bus interface Not used
I/O Two-way data bus with the RDS decoder
Description
"L": single chip
"L": RAM reset
XR-L240
25