Aaeon PCM-9150 Manual page 60

Intel pentium m / celeron m processors 18/36-bit lvds tft panel two ddrii 400/533 sodimm memory 6.1 ch ac-97 2.0 codec with s/p dif 4 usb 2.0 / 4 coms / digital io
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C o m p a c t B o a r d
push ax
push cx
xchg al,cl
mov cl,07h
call Superio_Set_Reg
pop cx
pop ax
ret
Set_Logic_Device endp
;Select 02Eh->Index Port, 02Fh->Data Port
Cfg_Port DB 087h,001h,055h,055h
DW 02Eh,02Fh
END Main
Note: Interrupt level mapping
0Fh-Dh: not valid
0Ch: IRQ12
.
.
03h: IRQ3
02h: not valid
01h: IRQ1
00h: no interrupt selected
Appendix B Programming the Watchdog Timer B-10
P C M - 9 1 5 0

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