PCB Layout
4
PCB Layout
Figure 1
to
Figure 3
6
TPS7B70EVM-008 Evaluation Module
illustrate the PCB layout for this EVM.
Figure 1. Assembly Layer
Figure 2. Top Layer Routing
Copyright © 2018, Texas Instruments Incorporated
www.ti.com
SBVU047 – April 2018
Submit Documentation Feedback
Need help?
Do you have a question about the TPS7B70EVM-008 and is the answer not in the manual?