Aaeon HSB-835P Manual page 44

Intel® pentium®4 processor picmg/pci half-size cpu card with ddr, ethernet, compactflash™ & sata
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H a l f - s i z e C P U C a r d
0aah:
WatchDog Timer Register I (Index=F5h, Default=00h)
CRF5 (PLED mode register. Default 0 x 00)
Bit 7-6
Bit 5-4
Bit 3
Bit 2
Bit 1-0
WatchDog Timer Register II (Index=F6h, Default=00h)
Bit 7-0
Appendix B Programming the Watchdog Timer
2Eh
: select PLED mode
= 00 Power LED pin is tri-stated.
= 01 Power LED pin is drived low.
= 10 Power LED pin is a 1Hz toggle pulse
with 50 duty cycle.
= 11 Power LED pin is a 1/4Hz toggle pulse
with 50 duty cycle.
: Reserved
: select WDTO count mode.
= 0
second
= 1
minute
: Enable the rising edge of keyboard Reset
(P20) to force Time-out event.
= 0 Disable
= 1 Enable
: Reserved
= 0 x 00 Time-out Disable
= 0 x 01 Time-out occurs after 1
second/minute
H S B - 8 3 5 P
2Fh
B-4

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