Sharp MD-E9000H Service Manual page 81

ICT21 VHiLC72723/-1: RDS Decorder (LC72723)
Pin No. Terminal Name
1 VREF
2 MPXIN
3 VDDA
4 VSSA
5 FLOUT
6 CIN
7 TEST
8 XOUT
9 XIN
10 VSSD
11 VDDD
12 MODE
13 RST
14 RDDA
15 RDCL
16 RDS-ID/READY
VREF
VDDA 3
REFERENCE
VOLTAGE
VSSA 4
ANTIALIASING
MPXIN 2
FILTER
TEST 7
TEST
VREF
1
MPXIN
2
VDDA 3
VSSA 4
FLOUT 5
CIN 6
TEST 7
XOUT 8
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Input/Output
Output Reference voltage output. (Vdda/2)
Input Baseband (multiplexed) signal input.
Input Analog power supply. (+5 V)
— Analog ground.
Output Subcarrier output. (filter output)
Input Subcarrier input. (comparator input)
Input Test input.
Output Crystal oscillator output. (4.332 MHz)
Input Crystal oscillator input. (external reference signal input)
— Digital ground.
Input Digital power supply. (+5 V)
Input Read mode setting. (0: master, 1: slave)
Input RDS-ID/RAM reset. (positive polarity)
Output RDS data output.
Input/Output RDS clock output. (master mode)
RDS clock input. (slave mode)
Output RDS-ID/READY output. (negative polarity)
FLOUT
CIN
1 5 6
VREF
57 kHz
BPF
SMOOTHING
(SCF)
FILTER
CLK (4.332 MHz)
OSC
9 8
XIN XOUT
16
RDS-ID/READY
15 RDCL
14 RDDA
13
RST
12
MODE
VDDD
11
10 VSSD
9 XIN
Figure 81 BLOCK DIAGRAM OF IC
Function
–
PLL
RECOVERY
(57 kHz)
+
– 81 –
MD-E9000H
CLOCK 11 VDDD
(1187.5 Hz)
10 VSSD
DATA
14 RDDA
DECODER
15 RDCL
RAM
12 MODE
(128-bits)
13 RST
16 RDS-ID/
RDS ID
READY
DETECT