Logical Structure - Huawei FusionServer Pro CH225 V5 Technical White Paper

Huawei FusionServer Pro CH225 V5 Compute Node
Technical White Paper
Figure 4-1 CH225 V5 logical structure
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Issue 06 (2020-07-31)
The server supports two Intel
The server supports up to 24 memory modules.
The CPUs (processors) interconnect with each other through three UPI links at
a speed of up to 10.4 GT/s.
The mezzanine cards connect to the processors through PCIe buses to provide
service ports.
The Platform Controller Hub (PCH) has a built-in MAC chip and provides two
10 Gbit/s ports.
The processors, PCIe Switch, and SAS/SATA/NVMe drive backplane constitute
a storage module. The PCIe Switch expands 12 PCIe x4 channels for the
processors, allowing the SAS/SATA/NVMe drive backplane to support 12
NVMe PCIe SSDs.
Copyright © Huawei Technologies Co., Ltd.
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Logical Structure

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Xeon Scalable processors.
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