TYAN Tomcat i925X S5130 User Manual page 38

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Tomcat i925X S5130
Thermal Management
Thermal Management throttles the processor back as it reaches its maximum operating
temperature. Throttling reduces the number of processing cycles, thereby diminishing the heat
dissipation of the CPU. This cools the unit. Once the CPU has reached a safe operating
temperature, thermal throttling is automatically disabled, and normal full speed processing
begins again.
The BIOS supports two types of thermal management.
Thermal Monitor 1: Thermal Monitor 1 uses a highly accurate on-die temperature
sensing circuit in the CPU that has the ability to act quickly upon any thermal issues
(~50ns). This circuitry keeps an eye on the most taxed areas of the CPU-die at all
times and will quickly act upon temperatures going over the safety limits. The
thermal monitor's control circuit, when active, lowers the CPU temperature by
throttling the internal CPU clock speed. This is done with a 50% duty-cycle, which
means that a 2GHz CPU will then effectively run at a 1GHz clock speed. Due to the
fast response time of the thermal monitor circuit (~50ns) the CPU will only be
'throttled' for a very brief period. Once the CPU-die temperature is within safe
operating limits again it'll set back to the 2GHz clock speed it originally operated at.
Thermal Monitor 2: Thermal Monitor 2 decreases or increases the CPU clock and
core voltage according to the CPU load. This information is read from the five VID
pins of the CPU. Accordingly, the CPU temperature is also automatically decreased,
when the core voltage is decreased. This improves the CPU lifespan. The states
switch is so fast that the performance decrease is insignificant.
TM2 Bus Ratio
This represents the throttle frequency for the Trimedia TM2 PCI bus interface.
Enter any integer number between 0 and 255 inclusive to set this frequency.
TM2 Bus VID
This represents the throttle voltage for the Trimedia TM2 PCI bus interface.
Choose a value between 0.8375V and 1.6000V inclusive, in steps of 0.0125V.
Limit CPUID MaxVal
Set Limit CPUID MaxVal to 3, should be "Disabled" for WinXP.
Enabled / Disabled
NX BIOS Control
Enable this option only if you have an NX chipset. NX (No eXecute) memory protection
coupled with the codenamed LaGrande technology (LT) is a new secure computing initiative
from Intel.
Enabled / Disabled
CPU L1 & L2 Cache
This option toggles the use of CPU L1 and L2 cache. The L1 cache is also called the primary
cache or internal cache and is built into the processor. The L2 cache also called as the
external cache is placed between the CPU and the DRAM (dynamic RAM). A memory cache,
sometimes called a cache store or RAM cache, is a portion of memory made of high speed
static RAM (SRAM) instead of the slower and cheaper dynamic RAM (DRAM) used for main
memory. These caches store frequently accessed instructions and data. Memory caching is
effective because most programs access the same data or instructions over and over. By
keeping as much of this information as possible in SRAM, the computer avoids accessing the
slower DRAM.
Enabled / Disabled
CPU L3 Cache
This BIOS feature controls the functionality of the processor's Level 3 cache.
When enabled, the processor's Level 3 cache will be allowed to function. This allows the best
possible performance from the processor.
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Chapter 3: BIOS Setup

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