Assumptions - Motorola MVME2401-1 Installation And Use Manual

Functional Description
3
Transaction
64-bit Writes
64-bit Reads
32-bit Writes
32-bit Reads
64-bit Writes
64-bit Reads
32-bit Writes
32-bit Reads
64-bit Writes
64-bit Reads
32-bit Writes
32-bit Reads
64-bit Writes
64-bit Reads
32-bit Writes
32-bit Reads
64-bit Writes
64-bit Reads
32-bit Writes
32-bit Reads

Assumptions

3-12
Table 3-7. PCI Originated Bandwidth Matrix
First 2
Cache Lines Cache Lines
MBytes
Clks Clks
sec
10 213 18
16 133 24
18 118 34
24 89 40
10 427 18
19 225 27
18 237 34
28 152 44
10 213 18
16 133 24
18 118 34
24 89 40
10 213 18
18 118 26
18 118 34
26 82 42
10 427 18
23 186 34
18 237 34
31 138 47
Certain assumptions have been made with regard to MVME2400
performance. Somethings which are assumed in making the
aforementioned tables include the following:
First 4 First 6
Cache Lines
MBytes MBytes
Clks
sec
237 26
178 32
125 50
107 56
474 26
316 37
251 50
194 60
237 26
178 32
125 50
107 56
237 26
164 34
125 50
102 58
474 30
251 46
251 50
182 63
Computer Group Literature Center Web Site
Continuous
Clks/ MBytes
sec Line sec
246 4 266
200 4 266
128 8 133
114 8 133
492 4 533
346 4 533
256 8 267
213 8 267
246 4 266
200 4 266
128 8 133
114 8 133
246 4 266
188 4 266
128 8 133
110 8 133
427 5 427
278 5.5 388
256 8 267
203 8 267
Clock
Ratio
5:2
3:2
3:1
2:1
1:1