Motorola MVME2401-1 Installation And Use Manual page 158

DRAM
DTE
ECC
ECP
EEPROM
EIDE
EISA (bus)
G
EPP
L
EPROM
O
S
S
ESCC
A
ESD
R
Ethernet
Y
Falcon
fast Ethernet
FDC
GL-4
Dynamic Random Access Memory. A memory technology that is
characterized by extreme high density, low power, and low cost. It
must be more or less continuously refreshed to avoid loss of data.
Data Terminal Equipment.
Error Correction Code
Extended Capability Port
Electrically Erasable Programmable Read-Only Memory. A
memory storage device that can be written repeatedly with no
special erasure fixture. EEPROMs do not lose their contents when
they are powered down.
Enhanced Integrated Drive Electronics. An improved version of
IDE, with faster data rates, 32-bit transactions, and DMA. Also
known as Fast ATA-2.
Extended Industry Standard Architecture (bus) (IBM). An
architectural system using a 32-bit bus that allows data to be
transferred between peripherals in 32-bit chunks instead of 16-bit or
8-bit that most systems use. With the transfer of larger bits of
information, the machine is able to perform much faster than the
standard ISA bus system.
Enhanced Parallel Port
Erasable Programmable Read-Only Memory. A memory storage
device that can be written once (per erasure cycle) and read many
times.
Enhanced Serial Communication Controller
Electro-Static Discharge/Damage
A local area network standard that uses radio frequency signals
carried by coaxial cables.
The DRAM controller chip developed by Motorola for the
MVME2600 and MVME3600 series of boards. It is intended to be
used in sets of two to provide the necessary interface between the
Power PC60x bus and the 144-bit ECC DRAM (system memory
array) and/or ROM/Flash.
See 100Base-TX.
Floppy Disk Controller
Computer Group Literature Center Web Site
Glossary