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1260-100/101 Adapt-a-Switch Carrier Module User Manual
The signal LBUSC10S is an open-collector line from the Option-01T. During power turn-on, the
Option-01T drives LBUSC10S low for about 100ms, then allows it to be pulled high. While
LBUSC10S is low, it resets all relay drivers on all plug-ins to the inactive state, opening all relays. It
also clears all outputs on digital test plug-ins to a known state.
LBUSC10S also serves another function when a plug-in asserts a global reset during an
emergency reset event. When such an event occurs, the plug-in drives LBUSC10S low. It leaves
it low until the event has passed and the Option-01T firmware clears the reset latch in the plug-in.
LBUSC10S also connects to all other devices controlled by the same Option-01T. When any
device in this group asserts a global reset, all devices in the group respond by resetting their
drivers.
Interrupt
The signal LBUSC11S is an open-collector line to the Option-01T. It has two purposes. When a
plug-in asserts an emergency reset condition, it drives the LBUSC11S signal low. Also, the
1260-114 drives the LBUSC11S signal low to announce a synchronous event. When LBUSC11S
goes low, the Option-01T polls the plug-ins to determine which one generated the interrupt. It then
responds accordingly.
Communications
U1 is a programmable logic device (PLD) that handles the communications between the plug-ins
and the Option-01T. It implements the same state machine used in 1260-Series switch modules.
communications proceed as follows.
When the Option-01T is about to write data to a plug-in, it takes HLBUS_A/D to a logic 1, indicating
that the data to be serially shifted out will be an address. It also drives the HLBUS_R/W signal low
to indicate that data will be written. It then outputs an 8MHz clock on HLBUS_CLK, and places
serial data on HLBUS_DATAIN, synchronous with HLBUS_CLK. The first 13 bits of data represent
the address to be written to, with the most-significant bit first. This address is relative to the A24
address offset assigned to the Option-01T by RESMAN. For example, address 0 references the
first address in the space allocated to the Option-01T.
The 13 address bits are clocked into a shift register comprised of U5 and U6. The parallel outputs
of this shift register are connected directly to all six plug-ins via the 1260-100 backplane.
After sending the address, The Option-01T drives HLBUS_A/D low, indicating that the next data
sent will be data. It then shifts the serial data that will be written to the address just sent. There
are eight data bits, with the most-significant bit sent first.
After the last data bit has been sent, the signal HLBUS_STROBE transitions to a logic high for one
clock period of HLBUS_CLK. HLBUS_STROBE is sent to the six plug-ins. The plug-in containing
the addressed device uses HLBUS_STROBE to latch the data into the device.
To read data from a plug-in, the Option-01T begins by taking HLBUS_A/D to a logic 1, indicating
that the data to be serially shifted out will be an address. It also drives the HLBUS_R/W signal high
to indicate that data will be read. It then outputs an 8MHz clock on HLBUS_CLK, and shifts the
address out on HLBUS_DATAIN, as it does when writing.
B-3
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