Qspi - Ublox EVK-BMD-340 User Manual

Figure 11: External J-Link debug interface
In order to enable the external J-Link connection, ensure the following are implemented on the
target hardware:
• EXT_VTG is used by the debug interface as an input to sense power applied to the external
circuit. Only voltages of 3.0 V to 3.3 V are supported. Target hardware operating voltages
outside of this range require the use of an external SEGGER J-Link Debug Probe. Connect
EXT_VTG to the BMD-34 series power supply (VCC) on the target hardware.
• EXT_GND_DETECT is used by the debug interface to detect the presence of an external
target hardware. Connect EXT_GND_DETECT to GND on the target hardware.
• Connect GND to GND on the target hardware.
• Connect EXT_SWDIO to SWDIO and EXT_SWCLK to SWDCLK on the target BMD-34
module.
• (Optional) Connect EXT_SWO and/or EXT_RESETn on the target BMD-34 module.
• Connect external power to the target hardware, then connect the BMD-34 series evaluation
board to USB.
☞
At this point, the debug interface will interact with the target hardware instead of the on-
board BMD-34 module.

2.9 QSPI

A 64 Mbit Quad SPI (MX25R6435F) flash is available on the BMD-34-EVAL. This memory can
be used for execute in place (XIP) directly from the flash as well as general data storage.
Figure 12: Quad SPI flash
UBX-19033356 - R05
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Hardware description
BMD-34 / 38 EVK - User guide
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