Transmiter Circuits; Pll Circuits - Icom IC-4088SR Service Manual

4-1-6 SQUELCH CIRCUIT (RF AND MAIN UNITS)
(1) NOISE SQUELCH
The noise squelch circuit cuts out AF signals when no RF
signals are received. By detecting noise components in the
AF signals, the squelch circuit switches the AF mute switch.
A portion of the AF signals from the FM IF IC (RF unit; IC1,
pin 9) are applied to the active filter section (RF unit; IC1,
pin 8). The active filter section amplifies and filters noise
components. The filtered signals are applied to the noise
detector section and output from pin 14 as the "SQLIN" sig-
nal.
The "SQLIN" signal from IC1 (pin 14) on the RF unit passes
through J300, pin 12, and is then applied to the CPU (MAIN
unit; IC301, pin 46). The CPU analyzes the noise condition
and outputs the "RMUT" (from pin 64) and "AFON" (from pin
58) signals to toggle the AF mute (MAIN unit; Q316) and vol-
ume mute (MAIN unit; Q311) switches.
(2) TONE SQUELCH
The tone squelch circuit detects AF signals and opens the
squelch only when receiving a signal containing a matching
subaudible tone (CTCSS). When tone squelch is in use, and
a signal with a mismatched or no subaudible tone is
received, the tone squelch circuit mutes the AF signals even
when noise squelch is open.
A portion of the AF signals from the FM IF IC (RF unit; IC1,
pin 9) passes through the AF control (MAIN unit; IC304) to
control the volume mute and AF mute switches.
4-2 TRANSMITTER CIRCUITS
4-2-1 MICROPHONE AMPLIFIER CIRCUIT
(MAIN UNIT)
AF signals from the internal/external microphone are applied
to the microphone amplifier circuit and low-pass filter
(IC304) via the microphone switch (Q313). The filterd audio
signals are applied to the modulation circuit on the RF unit
via J300, pin 15 as the "MOD" signal.
4-2-2 MODULATION CIRCUIT (RF UNIT)
The filtered audio signals from J300, pin 15 (on the MAIN
unit) are applied to the modulation circuit (D8, D9) to modu-
late transmit signals at the VCO circuit (Q8).
The modulated signal is applied to the drive amplifier circuit.
• PLL CIRCUIT
Loop
filter
to the FM IF IC
(IC1, pin1)
X2
21.25 MHz
VCO
Buffer
Q7
Q8, D8, D9
Phase Programmable
13
detector counter
17
Programmable
divider
16
4-2-3 DRIVE/POWER AMPLIFIER CIRCUITS
(RF UNIT)
The drive/power amplifier circuit amplifies the VCO oscillat-
ing signal to the output power level.
The modulated transmit signal is amplified at the drive
amplifiers (Q5, Q6) after being amplified at the buffer ampli-
fiers (Q7, Q13). The amplified signal is amplified at the
power amplifier (Q4) to obtain 450 mW of RF power.
The signal is passed through the antenna switching circuit
(D1) and low-pass filter, and is then applied to the antenna.
4-3 PLL CIRCUITS (RF UNIT)
A PLL circuit provides stable oscillation of the transmit fre-
quency and receive 1st LO frequency. The PLL output com-
pares the phase of the divided VCO frequency to the refer-
ence frequency. The PLL output frequency is controlled by
the divided ratio (N-data) of a programmable divider.
The PLL circuit consists of the VCO circuit (Q8, D8, D9). An
oscillated signal from the VCO passes through the buffer
amplifier (Q7), and is applied to the PLL IC (IC2, pin19) to
prescale in the PLL IC based on the divided ratio (N-data).
The reference signal is generated at the reference oscillator
(X2), and is applied to the PLL IC. The PLL IC detects the
out-of-step phase using the reference frequency, and out-
puts detected signal from pin 14. The output signal is
passed through the loop filter (R44, C67) and is then applied
to the VCO circuit as lock voltage.
If the oscillated signal drifts, its phase changes from that of
the reference frequency, causing a lock voltage change to
compensate for the drift in the oscillated frequency.
Buffer
Q13
IC2 UPD3140GS
19
Prescaler
3
4
Shift register
5
4 - 2
D7
to 1st mixer circuit
D6
to transmitter circuit
PLSTB
PLCK
DATA