Yamaha Portable Grand DGX-630 Service Manual page 23

I LSI PIN DESCRIPTION（LSI 端子機能表）
CONTENTS（目次）
G AK4385ET (X6040A01) DAC ....................................................................................... 26
R8A02032BG (X8810A00) CPU (SWX02) ................................................................... 24
G
G S1D13700F01A100 (X5422A00) LCD CONTROLLER ............................................... 23
G UPD789022GB-A15-8E (XZ56010R) CPU (MKS) ....................................................... 23
UPD789022GB-A15-8E (XZ56010R) CPU (MKS)
PIN
NAME I/O
NO.
1 P12 I/O
2 P11 I/O Port 1
3 P10 I/O
4 P47/KR7 I/O
5 P46/KR6 I/O
6 P45/KR5 I/O
7 P44/KR4 I/O
Port 4/Key return signal detection input
8 P43/KR3 I/O
9 P42/KR2 I/O
10 P41/KR1 I/O
11 P40/KR0 I/O
12 NC
13 IC Internally connected (N.C.)
14 X2
Clock
15 X1 I
16 VSS0 Ground
17 VDD0 Power supply
18 /RESET I System reset
19 P53 I/O
Port 5
20 P52 I/O
21 P51/TO2 I/O Port 5/16-bit timer output
22 P50/TI0/TO0 I/O Port 5/External count clock input to 8-bit timer/8-bit timer output
S1D13700F01A100 (X5422A00) LCD CONTROLLER
PIN
NAME I/O
NO.
1 VSS Ground
2 I
AB12
3 AB11 I
4 AB10 I Address bus
5 AB9 I
6 AB8 I
7 HIOVDD Power supply
8 AB7 I
9 AB6 I
Address bus
10 AB5 I
11 AB4 I
12 COREVDD Power supply
13 AB3 I
14 AB2 I
Address bus
15 AB1 I
16 AB0 I
17 VSS Ground
18 FPDAT3 O
19 FPDAT2 O
Data bus
20 FPDAT1 O
21 FPDAT0 O
22 NIOVDD Power supply
23 FPSHIFT O Shift clock
24 XECL O X driver enable chain clock
25 COREVDD Power supply
26 FPLINE O Latch pulse
27 MOD O Frame signal
28 VSS Ground
29 YSCL O Scan shift clock
30 FPFRAME O Scan start pulse
31 YDIS O LCD power-down output
32 NIOVDD Power supply
FUNCTION
FUNCTION
PIN
NAME I/O
NO.
23 P32/INTP2/CPT2 I/O Port 3/External interrupt input/Capture edge input
24 P31/INTP1 I/O
Port 3/External interrupt input
25 P30/INTP0 I/O
26 P22/RXD/SI0 I/O Port 2/Asynchronous serial interface serial data input/Serial interface serial data input
27 P21/TXD/SO0 I/O Port 2/Asynchronous serial interface serial data output/Serial interface serial data output
28 P20/ASCK//SCK0 I/O Port 2/Asynchronous serial interface serial clock input/Serial interface serial clock
29 P07 I/O
30 P06 I/O
31 P05 I/O
32 P04 I/O
Port 0
33 P03 I/O
34 P02 I/O
35 P01 I/O
36 P00 I/O
37 NC
38 VDD1 Power supply
39 VSS1 Ground
40 P17 I/O
41 P16 I/O
42 P15 I/O Port 1
43 P14 I/O
44 P13 I/O
PIN
NAME I/O
NO.
33 VSS Ground
34 XCD1 O Drain output
35 XCG1 I Gate input
36 RESET# I Reset
37 SCANEN I
Test mode set up input
38 TESTEN I
39 CLKI I Externally sourced system clock
40 COREVDD Power supply
41 RD# I Read strobe
42 WR# I Write strobe
43 CS# I Chip select
44 DB7 I/O
45 DB6 I/O
Data bus
46 DB5 I/O
47 DB4 I/O
48 HIOVDD Power supply
49 DB3 I/O
50 DB2 I/O
Data bus
51 DB1 I/O
52 DB0 I/O
53 VSS Ground
54 WAIT# O Wait output
55 HIOVDD Power supply
56 CNF0 I
57 CNF1 I
58 CNF2 I Input pin for S1D 13700 setting
59 CNF3 I
60 CNF4 I
61 AS# I Address strobe
62 AB15 I
63 AB14 I Address bus
64 AB13 I
DGX-630/YPG-635
DM: IC17
FUNCTION
DM: IC4
FUNCTION
23