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(Secs):
Chipset Features Setup
Auto Configuration
DRAM Speed Selection
MA Wait State
EDO RAS# To CAS# Delay
EDO RAS# Precharge Time
EDO DRAM Read Burst
EDO DRAM Write Burst
DRAM Data Integrity Mode
CPU-To-PCI IDE Posting
System BIOS Cacheable
Video BIOS Cacheable
Video RAM Cacheable
8Bit I/O Recovery Time
16
Bit I/O Recovery Time
Memory Hole At 15M-16M
Delayed Transaction
AGP Aperture Size (MB)
SDRAM RAS-To-CAS Delay
SDRAM RAS Precharge Time
The following pages tell you the options of each item and describe the
meaning of each option.
Item
• Auto Configuration
• DRAM Speed
Selection
• MA Wait State
• EDO RAS# To CAS#
Delay
accessed by the system.
ROM PCI/ISA BIOS (2A69JQ19)
CHIPSET FEATURES SETUP
AWARD SOFTWARE, INC.
:Enabled
:50ns
:Slow
:3
:3
:×222
:×222
:Non-ECC
:Enabled
:Disabled
:Disabled
:Disabled
:1
:1
:Disabled
:Disabled
:64
:Fast
:Fast
Figure-5 Chipset Features Setup Menu
Option
Enabled
Automatically configure DRAM Timing according
to the value of "DRAM Speed Selection".
Disabled
Manually configure.
Note: It is recommended to choose "Enabled"
option for common users.
50ns,
This item is of selected EDO DRAM read/write timing.
You must ensure that your DIMMs are as fast as 50ns,
60ns
otherwise you have to select 60ns.
Slow
One additional wait state is inserted before the
assertion of the first MA and CAS#/RAS# during
DRAM read or write leadoff cycles. This affects
page hit, row miss and page miss cases.
Without additional wait state.
Fast
2
Add a delay time between the assertion of RAS#
and CAS#
Without additional delay time.
3
Chapter 4
SDRAM CAS Latency Time : 2
↑↓→← : Select Item
ESC: Quit
F1 : Help
PU/PD/+/- : Modify
F5 : Old Values (Shift)F2: Color
F6 : Load BIOS Defaults
F7 : Load Setup Defaults
Description
4 - 7
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