Inrevium VIRTEX-5 TB-5V-LX110/220/330-DDR2 Hardware User's Manual page 24

Multi-application platform board
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TB-5V-LX110/220/330-DDR2Hardware User Guide Rev2.1s
FPGA Configuration
The following 1) ~ 4) are descriptions of FPGA configuration.
1) Set JP1 "BPI UP" mode.
*Note: JP2, 6, 7, 8, 9, 10 are jumpers for power supply setting of I/O Banks. (Page.9)
Figure.59 BPI UP Mode Setting
2) Set SW3 as Figure.60 and power on the board.
SW3 Silk
1
2
ON
OFF
Figure.60 Setting of SW3 (When FPGA Configuration)
4, 2007 (Rev 2.1s)
24/26
Sep

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