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Inrevium TB-FMCH-DP3 Hardware User Manual

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TB-FMCH-DP3 Hardware User's Manual
TB-FMCH-DP3
Hardware User's Manual
Rev.1.03
1
Rev.1.03

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Summary of Contents for Inrevium TB-FMCH-DP3

  • Page 1 TB-FMCH-DP3 Hardware User’s Manual TB-FMCH-DP3 Hardware User’s Manual Rev.1.03 Rev.1.03...
  • Page 2 TB-FMCH-DP3 Hardware User’s Manual Revision history Revision Date Description Publisher Rev.1.00 2015/10/29 Initial Release Ueda Rev.1.01 2016/03/25 4.7.1 Modify value of data to R31 Amano Modify Table.4-6 Rev.1.02 2016/06/15 Add description of board Rev.2.2 Amano Rev.1.03 2017/04/21 Table 4-7 Pin Assign Modify Goto Rev.1.03...

  • Page 3: Table Of Contents

    TB-FMCH-DP3 Hardware User’s Manual Table of Contents Related Documents and Board Accessories ................8 Overview ............................8 Feature ............................8 TB-FMCH-DP3 Function ......................9 4.1. Block Diagram ..........................9 4.2. External View of the Board ....................... 10 4.3. Board Specification ........................11 4.4.
  • Page 4 Table 4-8 CN3 Pin assign (For expanded Board) ................30 List of figures Figure 3-1 High-pin Count Pin assignment ..................8 Figure 4-1 TB-FMCH-DP3 Block Diagram ..................9 Figure 4-2 Top view .......................... 10 Figure 4-3 bottom view ........................10 Figure 4-4 TB-FMCH-DP3 Dimension Diagram ................
  • Page 5 TB-FMCH-DP3 Hardware User’s Manual Introduction Thank you for purchasing the TB-FMCH-DP3 board. Before using the product, be sure to carefully read this user manual and fully understand how to correctly use the product. First read through this manual, then always keep it handy.
  • Page 6 TB-FMCH-DP3 Hardware User’s Manual Warning In the event of a failure, disconnect the power supply. If the product is used as is, a fire or electric shock may occur. Disconnect the power supply immediately and contact our sales personnel for repair.
  • Page 7 TB-FMCH-DP3 Hardware User’s Manual Caution Do not use or place the product in the following locations.  Humid and dusty locations  Airless locations such as closet or bookshelf  Locations which receive oily smoke or steam  Locations exposed to direct sunlight ...

  • Page 8: Related Documents And Board Accessories

    Board Accessories: Spacer set : x1 2. Overview The TB-FMCH-DP3 provides test environment for DisplayPort Standard Version1, Revision 2a. It supports below features 4 Lane of 1.62Gbps, 2.7Gbps and 5.4Gbps It uses TI SN75SP130 for Source(TX) and SN65DP159 for Sink(RX) AUX Communication.(FAUX is not supported)

  • Page 9: Tb-Fmch-Dp3 Function

    CN4 is mounted to bottom side and it will connect to FPGA Evaluation boards. Please see more detail of each circuit. Microwire Status 27MHz CLKOUT0 27MHz Clean clock(27MHz) SINK_AUX SINK_LANE(x4) CLK_OUT SINK_HPD SOURCE_AUX SOURCE_LANE(x4) SOURCE_HPD Other (CAD,DDC,etc) Stack Board I/O Signal (CN3) Figure 4-1 TB-FMCH-DP3 Block Diagram Rev.1.03...

  • Page 10: External View Of The Board

    TB-FMCH-DP3 Hardware User’s Manual 4.2. External View of the Board The following figures show the external views of the Board. DisplayPort Connector DisplayPort FMC-HPC Equalizer/Driver for stacked board Figure 4-2 Top view FMC-HPC for Platform 基板 Figure 4-3 bottom view...

  • Page 11: Board Specification

    TB-FMCH-DP3 Hardware User’s Manual 4.3. Board Specification External Dimensions: W:78.8mm x H:69.0mm Number of Layers: 8 Layers Board Thickness: 1.6mm Material: MEG-6(R-5775) or same specification. Figure 4-4 TB-FMCH-DP3 Dimension Diagram Rev.1.03...

  • Page 12: Power Supply

    TB-FMCH-DP3 Hardware User’s Manual 4.4. Power Supply This board generates required voltage(1.1V) of DP139 from +3.3V is coming from FMC Connector. Following is block diagram of power circuit. 1.1V VADJ +3.3V (RX IC Core Power) Power IC 3.3V to 1.1V...

  • Page 13: Source(Tx) Block

    TB-FMCH-DP3 Hardware User’s Manual 4.5. Source(TX) Block Following figure shows block diagram of Source circuit. DP130 keep signal integrity before transfer signal via cable and it can change swing level and pre-emphasis by AUX communication. SOURCE_AUX SOURCE_AUX_RX Singl to SOURCE_AUX_TX...

  • Page 14: Sink(Rx) Block

    TB-FMCH-DP3 Hardware User’s Manual 4.6. Sink(RX) Block Following figure shows block diagram of Sink circuit. DP159 keep signal integrity as swing level and jitter. SINK_AUX SINK_AUX_RX Singl to SINK_AUX_TX LVDS SINK_AUX_DE SINK_LANE(x4) SINK_HPD SINK_I2C(SCL/SDA) SINK_EN CLK_OUT Figure 4-8 Block Diagram of Sink circuit...

  • Page 15: Table 4-4 Dp159 I2C Address

    TB-FMCH-DP3 Hardware User’s Manual Accessing to DP159 via I2C interface. It is possible to accessing DP159 via I2C interface. About I2C address please refer to below table. Note: It is required to access DP159 via I2C. setting is depended on AUX communication.

  • Page 16: Clock Circuit

    TB-FMCH-DP3 Hardware User’s Manual 4.7. Clock circuit Following block diagram shows PLL circuit. PLL device is TI “LMK04906” to generating reference clock of FPGA Microwire Status 27MHz CLKOUT0 27MHz Clean clock(27MHz) Figure 4-9 Block Diagram of PLL Circuit Table 4-5 signals of PLL circuit...

  • Page 17: Operation Example Of Pll

    TB-FMCH-DP3 Hardware User’s Manual 4.7.1. Operation example of PLL This section described how to set resister of PLL for generating 135MHz, 81MHz, 162MHz and 270MHz. 1) Enable resister change: Write 0x0000001F to R31 2) Reset to PLL: write 0x00200000 to R00 3) Set following settings to each resister.

  • Page 18: Fmc Connector For Stacking

    Table 4-7 CN4 Pin assign (To carrier board) shows FMC pin assignment. Signal direction is assigned as follows: -“I”: The signal came from carrier board to TB-FMCH-DP3. -“O”: The signal came from TB-FMCH-DP3 to carrier board. Blue Character signal are connected to CN4 FMC Expansion connector.

  • Page 19: Table 4-7 Cn4 Pin Assign (To Carrier Board)

    TB-FMCH-DP3 Hardware User’s Manual Table 4-7 CN4 Pin assign (To carrier board) A row in HPC pin assignment (CN4) FMC signal Signal in schematic Note DP1_M2C_P SINK_ML_LANE1_P SINK MainLink LANE1 (Positive) DP1_M2C_N SINK_ML_LANE1_N SINK MainLink LANE1 (Negative) DP2_M2C_P SINK_ML_LANE2_P SINK MainLink LANE2 (Positive)
  • Page 20 TB-FMCH-DP3 Hardware User’s Manual B row in HPC pin assignment (CN4) FMC signal Signal in schematic Note RES1 DP9_M2C_P DP9_M2C_N DP8_M2C_P DP8_M2C_N SINK MainLink LANE3 (Positive, DP7_M2C_P EX_SINK_ML_LANE3_P expanded board) SINK MainLink LANE3 (Negative, DP7_M2C_N EX_SINK_ML_LANE3_N expanded board) SINK MainLink...
  • Page 21 TB-FMCH-DP3 Hardware User’s Manual C row in HPC pin assignment (CN4) FMC signal Signal in schematic Note DP0_C2M_P SOURCE_ML_LANE0_P SOURCE MainLink LANE0 (Positive) DP0_C2M_N SOURCE_ML_LANE0_N SOURCE MainLink LANE0 (Negative) DP0_M2C_P SINK_ML_LANE0_P SINK MainLink LANE0 (Positive) DP0_M2C_N SINK_ML_LANE0_N SINK MainLink LANE0 (Negative)
  • Page 22 TB-FMCH-DP3 Hardware User’s Manual D row in HPC pin assignment (CN4) FMC signal Signal in schematic Note PG_C2M GBTCLK0_M2C_P GCLK0_P PLL Clock output 0(Positive) GBTCLK0_M2C_N GCLK0_N PLL Clock output 0(Negative) LA01_P_CC EX_SINK_HPD SINK Hot Plug Detect signal(expanded board) LA01_N_CC EX_SINK_EN...
  • Page 23 TB-FMCH-DP3 Hardware User’s Manual E row in HPC pin assignment (CN4) FMC signal Signal in schematic Note HA01_P_CC HA01_N_CC HA05_P HA05_N HA09_P HA09_N HA13_P HA13_N HA16_P HA16_N HA20_P HA20_N HB03_P HB03_N HB05_P HB05_N HB09_P HB09_N HB13_P HB13_N HB19_P HB19_N HB21_P...
  • Page 24 TB-FMCH-DP3 Hardware User’s Manual F row in HPC pin assignment (CN4) FMC signal Signal in schematic Note PG_M2C PG_M2C HA00_P_CC HA00_N_CC HA04_P HA04_N HA08_P HA08_N HA12_P HA12_N HA15_P HA15_N HA19_P HA19_N HB02_P HB02_N HB04_P HB04_N HB08_P HB08_N HB12_P HB12_N HB16_P...
  • Page 25 TB-FMCH-DP3 Hardware User’s Manual G row in HPC pin assignment (CN4) FMC signal Signal in schematic Note CLK1_M2C_P CLK1_P PLL Clock output2 (Positive) CLK1_M2C_N CLK1_N PLL Clock output2 (Negative) LA00_P_CC SOURCE_DDC_SDA Please fixed to High(1) LA00_N_CC SOURCE_DDC_SCL Please fixed to High(1)
  • Page 26 TB-FMCH-DP3 Hardware User’s Manual H row in HPC pin assignment (CN4) FMC signal Signal in schematic note VREF_A_M2C PRSNT_M2C_L CLK0_M2C_P CLK0_P PLL Clock output1 (Positive) CLK0_M2C_N CLK0_N PLL Clock output1 (Negative) LA02_P EX_SOURCE_DDC_SDA Please fixed to High(1) LA02_N EX_SOURCE_DDC_SCL Please fixed to High(1)
  • Page 27 TB-FMCH-DP3 Hardware User’s Manual J row in HPC pin assignment (CN4) FMC signal Signal in schematic note CLK3_M2C_P CLK3_M2C_N HA03_P HA03_N HA07_P HA07_N HA11_P HA11_N HA14_P HA14_N HA18_P HA18_N HA22_P HA22_N HB01_P HB01_N HB07_P HB07_N HB11_P HB11_N HB15_P HB15_N HB18_P...
  • Page 28 TB-FMCH-DP3 Hardware User’s Manual K row in HPC pin assignment (CN4) FMC signal Signal in schematic note VREF_B_M2C CLK2_M2C_P VCXO_OUT_P PLL VCXO Output (Positive) CLK2_M2C_N VCXO_OUT_N PLL VCXO Output (Negative) HA02_P HA02_N HA06_P HA06_N HA10_P HA10_N HA17_P_CC HA17_N_CC HA21_P HA21_N...

  • Page 29: Fmc Connector For Expanded Board (Cn3)

    From next page, Table 4-8 CN3 Pin assign (For expanded Board) shows FMC pin assignment. Signal direction is assigned as follows: -“I”: The signal came from carrier board to TB-FMCH-DP3. -“O”: The signal came from TB-FMCH-DP3 to carrier board. Rev.1.03...

  • Page 30: Table 4-8 Cn3 Pin Assign (For Expanded Board)

    TB-FMCH-DP3 Hardware User’s Manual Table 4-8 CN3 Pin assign (For expanded Board) A row in HPC pin assignment (CN3) FMC signal Signal in schematic Note SINK MainLink LANE1 DP1_M2C_P EX_SINK_ML_LANE1_P (Positive, extending board) SINK MainLink LANE1 DP1_M2C_N EX_SINK_ML_LANE1_N (Negative, extending board)
  • Page 31 TB-FMCH-DP3 Hardware User’s Manual B row in HPC pin assignment (CN3) FMC signal Signal in schematic Note RES1 DP9_M2C_P DP9_M2C_N DP8_M2C_P DP8_M2C_N DP7_M2C_P DP7_M2C_N DP6_M2C_P DP6_M2C_N GBTCLK1_M2C_P GBTCLK1_M2C_N DP9_C2M_P DP9_C2M_N DP8_C2M_P DP8_C2M_N DP7_C2M_P DP7_C2M_N DP6_C2M_P DP6_C2M_N RES0 Rev.1.03...
  • Page 32 TB-FMCH-DP3 Hardware User’s Manual C row in HPC pin assignment (CN3) FMC signal Signal in schematic Note SOURCE MainLink LANE0 DP0_C2M_P EX_SOURCE_ML_LANE0_P (Positive, extending board) SOURCE MainLink LANE0 DP0_C2M_N EX_SOURCE_ML_LANE0_N (Negative, extending board) SOURCE MainLink LANE3 DP0_M2C_P EX_SINK_ML_LANE0_P (Positive, extending board)
  • Page 33 TB-FMCH-DP3 Hardware User’s Manual D row in HPC pin assignment (CN3) FMC signal Signal in schematic Note PG_C2M GBTCLK0_M2C_P GBTCLK0_M2C_N LA01_P_CC LA01_N_CC LA05_P LA05_N LA09_P LA09_N LA13_P LA13_N LA17_P_CC LA17_N_CC LA23_P LA23_N LA26_P LA26_N 3P3VAUX +3.3V_AUX 3P3VAUX TRST_L 3P3V +3.3V...
  • Page 34 TB-FMCH-DP3 Hardware User’s Manual E row in HPC pin assignment (CN3) FMC signal Signal in schematic Note HA01_P_CC HA01_N_CC HA05_P HA05_N HA09_P HA09_N HA13_P HA13_N HA16_P HA16_N HA20_P HA20_N HB03_P HB03_N HB05_P HB05_N HB09_P HB09_N HB13_P HB13_N HB19_P HB19_N HB21_P...
  • Page 35 TB-FMCH-DP3 Hardware User’s Manual F row in HPC pin assignment (CN3) FMC signal Signal in schematic Note PG_M2C PG_M2C HA00_P_CC HA00_N_CC HA04_P HA04_N HA08_P HA08_N HA12_P HA12_N HA15_P HA15_N HA19_P HA19_N HB02_P HB02_N GND- HB04_P HB04_N HB08_P HB08_N HB12_P HB12_N...
  • Page 36 TB-FMCH-DP3 Hardware User’s Manual G row in HPC pin assignment (CN3) FMC signal Signal in schematic Note CLK0_M2C_P CLK0_M2C_N LA00_P_CC EX_SOURCE_DDC_SDA Please fixed to High(1) LA00_N_CC EX_SOURCE_DDC_SCL Please fixed to High(1) SOURCE Hot Plug detect signal LA03_P EX_SOURCE_HPD (expanded board)
  • Page 37 TB-FMCH-DP3 Hardware User’s Manual H row in HPC pin assignment (CN3) FMC signal Signal in schematic Note VREF_A_M2C PRSNT_M2C_L CLK0_M2C_P CLK0_M2C_N LA02_P LA02_N LA04_P LA04_N LA07_P LA07_N LA11_P LA11_N LA15_P LA15_N LA19_P LA19_N LA21_P LA21_N LA24_P LA24_N LA28_P LA28_N LA30_P...
  • Page 38 TB-FMCH-DP3 Hardware User’s Manual J row in HPC pin assignment (CN3) FMC signal Signal in schematic Note CLK3_M2C_P CLK3_M2C_N HA03_P HA03_N HA07_P HA07_N HA11_P HA11_N HA14_P HA14_N HA18_P HA18_N HA22_P HA22_N HB01_P HB01_N HB07_P HB07_N HB11_P HB11_N HB15_P HB15_N HB18_P...
  • Page 39 TB-FMCH-DP3 Hardware User’s Manual K row in HPC pin assignment (CN3) FMC signal Signal in schematic Note VREF_B_M2C CLK2_M2C_P CLK2_M2C_N HA02_P HA02_N HA06_P HA06_N HA10_P HA10_N HA17_P_CC HA17_N_CC HA21_P HA21_N HA23_P HA23_N HB00_P_CC HB00_N_CC HB06_P_CC HB06_N_CC HB10_P HB10_N HB14_P HB14_N...
  • Page 40 TB-FMCH-DP3 Hardware User’s Manual Inrevium Company URL: http://solutions.inrevium.com/ E-mail: psd-support@teldevice.co.jp HEAD Quarter: Yokohama East Square, 1-4 Kinko-cho, Kanagawa-ku, Yokohama City, Kanagawa, Japan 221-0056 TEL: +81-45-443-4031 FAX: +81-45-443-4063 Rev.1.03...

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