HP 8340A Service Manual page 36

4. Press
[SHIFT] [MHz]
This key sequence sets up the I/O Strobe Subchannel. Enter the desired Subchannel number
where the yy is located.
5. Press [SHIFT] [kHz].
This key sequence sets up an I/O write and will allow data to be written to the device being
accessed.
6. Press
[O] [Hz].
Connect the DVM to the output of the DAC and note the voltage reading. The measured
7.
voltage is the offset voltage associated with the DAC. (For current output DACs, voltage
measurements must be made at the output of the following current to voltage stage.)
8. Enter the decimal value for the least signifi c ant data bit of the DAC (see Table 8A-5a) and
press
[Hz].
9. Verify that the DVM reading changes (note that the change for the least significant data bit
may be very small).
10. Repeat steps 8 and 9 for each of the data bits to the DAC.
3 TO 8 DECODER VERIFICATION
The 3 to 8 Decoders which may be tested using the following procedure are those which use 3
data bus lines to determine which one of eight output lines is set. These do not include the
decoders which use the address bus to generate I/O Strobes. An example of a 3 to 8 Decoder
which may be tested using the following procedure is A58U31 (see Block
Generator Assembly schematic). Using A58U34 as an example, the procedure for verifying the
operation of a 3 to 8 Decoder is as follows:
1. Verify the operation of the device's I/O Strobe as described in the strobe verifi c ation
procedure.
2. Press
[INSTR PRESET] [MANUAL].
Press
3. [SHIFT] [GHz]
This key sequence sets up the I/O Strobe Channel. Enter the desired Channel number where
the xx is located.
Press
4. [SHIFT] [MHz]
This key sequence sets up the I/O Strobe Subchannel. Enter the desired Subchannel number
where the yy is located.
5. Press
[SHIFT] [kHz]
Verify the operation of the decoder by setting one output line at a time and verifying that the
6.
correct line is set and the other output lines are not. Since A58U34 is an inverting 3 to 8
Decoder, entering a
0.3V) and the other output pins will remain high
(
<
14), press
[ 4] [O] [9] [6] [Hz]
pin labeled (pin
7 7),
13, and 14). The other fi v e output lines are set in a similar manner.
INPUT LATCH VERIFICATION
The input latches are devices which receive information and place it on the data bus for use by
the main instrument processor (eg. A59Ul 8). Known data is placed on the input to one of these
latches usingjumper wires and an I/O Read is performed to verify that the latch is operating. The
procedure is as follows:
1. Verify the operation of the input latch's I/O Strobe as described in the strobe verification
procedure.
2. Switch the HP 8340A to STANDBY.
Model 8340A - Service
yy
[Hz].
xx
[Hz].
yy
[Hz].
to set up an I/0 Write.
from the front panel will set the output pin labeled 0 (pin 15) low
[O] [Hz]
(decimal value of data bit 12, see Table 8A-5a). To set the output
press
[2] [8] [6] [7] [2] [Hz]
Scans by HB9HCA and HB9FSX
3V). To set the output labeled 1 (pin
(
>
(sum of decimal values of set data bits 12,
A58 Sweep
E,
8-35