HP 8340A Service Manual page 147

in synch with the output pulse
of TP7 will clock Ul5B and leave it in the RESET state.
15, LOW SWALLOW ENABLE is connected to the reset of Ul4B.
as LOW SWALLOW ENABLE is HIGH, HSWALLOW will be forced LOW
independently of its clock changing.
U l and U2 cause a pulse on TP7,
LOW, and HSWALLOW will be allowed to go HIGH when the next output
pulse (TP13) occurs.
The only time that states can potentially change in the swallow
Control is when there is an output pulse.
must decide to do one of two things for the subsequent output
pulse
(TP13); either divid� by N or N+l.
HSWALLOW line is clocked HIGH for only one input clock pulse.
divide by N, the Divide-By-N block is left uninterrupted.
decision to swallow an input pulse is made by considering two
things; whether the rate multipliers Ul and U2 outpu . t a pulse,
and the state of LOW SWALLOW ENABLE prior to the output pulse
(TP13). All four possible combinations are diagrammed in Figure
8C-14.
The things to notice in Figure
Whenever LOW SWALLOW ENABLE was HIGH prior to the output pulse
�
(TP13),
HSWALLOW always remained LOW throughout the sequence,
and no input pulse was swallowed.
Whenever the rate multipliers Ul and U2 did output a pulse,
�
LOW SWALLOW ENABLE was left in the LOW state,
the previous state of the line.
The definition of these lines can then be stated:
LOW SWALLOW ENABLE - When LOW,
�
swallowed during the next output pulse
HSWALLOW - When HIGH,
�
only be HIGH for a period of 1 input clock pulse,
timed such that the counter is never loading and holdi�g at
the same time.
RlO and C ll are important for the proper operation of State
as shown in Figure
did NOT output a pulse in this state,
must be left in the HIGH state after the sequence is over to
prevent a pulse from being swallowed next time.
potential race condition occurring at the inputs to Ul5B if it
were not for RlO and Cll.
is also clocking Ul5B through U3A NOR gate.
changing and an illegal setup violation would occur.
Model 834 0A - Service
(TP13).
LOW SWALLOW ENABLE will be left
8C-14 are:
an input pulse will be
causes Ul2 to hold its count.
Since the rate multipliers Ul and U2
8C-14.
Ul4A pin 2 HSWALLOW is going LOW,
Scans by HB9HCA and HB9FSX
The low-to-high transition
But if the rate multipliers
The swallow Control
To divide by N+l,
regardless of
(TP13) sequence.
the LOW SWALLOW ENABLE line
There would be a
Ul5B pin 10 is also
Ul5B pin
As long
the
To
The
This will
and will be
# 2
and
Instead, RlO
8-199