QDI K8V800 Series Manual page 38

BIOS Description BIOS Description
BIOS Description BIOS Description BIOS Description
AGP Master 1 WS
Write
AGP Master 1 WS
Read
LDT & PCI Bus Control
Item
Upstream LDT Bus
Width
Downstream LDT Bus 8bit/16bit
Width
LDT Bus Frequency
30
PCI1 Master 0 WS
Write
PCI2 Master 0 WS
Write
PCI1 Post Write
PCI2 Post Write
PCI Delay
Transaction
Enabled Enables AGP Master 1 WS Write.
Disabled Disables AGP Master 1 WS Write.
Enabled Enables AGP Master 1 WS Read.
Disabled Disables AGP Master 1 WS Read.
Option Description
8bit/16bit Set upstream LDT bus width.
Set downstream LDT bus width.
Auto Set LDT bus frequency.
200MHz
400MHz
600MHz
800MHz
Enabled Enables PCI1 Master 0 WS Write.
Disabled Disables PCI1 Master 0 WS Write.
Enabled Enables PCI2 Master 0 WS Write.
Disabled Disables PCI2 Master 0 WS Write.
Enabled Enables PCI1 Post Write.
Disabled Disables PCI1 Post Write.
Enabled Enables PCI2 Post Write.
Disabled Disables PCI2 Post Write.
Enabled Enables PCI Delay Transaction.
Disabled Disables PCI Delay Transaction.
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