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Infineon Cypress CY8CKIT-064B0S2-4343W Instructions Manual

Infineon Cypress CY8CKIT-064B0S2-4343W Instructions Manual

Psoc 64 “secure boot” wi-fi bt pioneer kit guide
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Summary of Contents for Infineon Cypress CY8CKIT-064B0S2-4343W

  • Page 1 The document following this cover page is marked as “Cypress” document as this is the company that originally developed the product. Please note that Infineon will continue to offer the product to new and existing customers as part of the Infineon product portfolio.
  • Page 2 PSoC 64 “Secure CY8CKIT-064B0S2-4343W Boot” Wi-Fi BT Pioneer Kit Guide CY8CKIT-064B0S2-4343W PSoC 64 “Secure Boot” Wi-Fi BT Pioneer Kit Guide Document Number: 002-29286 Rev. *E Cypress Semiconductor An Infineon Technologies Company 198 Champion Court San Jose, CA 95134-1709 www.cypress.com www.infineon.com...
  • Page 3 © Cypress Semiconductor Corporation, 2020-2021. This document is the property of Cypress Semiconductor Corporation, and Infineon Technologies company, and its affiliates (“Cypress”). This document, including any software or firmware included or referenced in this document (“Software”), is owned by Cypress under the intellectual property laws and treaties of the United States and other countries worldwide.

  • Page 4: Table Of Contents

    Contents Safety and Regulatory Compliance Information 1. Introduction Kit Contents .........................8 Getting Started......................9 Code Examples ......................9 Board Details .......................9 Additional Learning Resources..................15 Technical Support......................15 Documentation Conventions..................15 Acronyms........................16 2. Software Installation Before You Begin.......................18 Install Software ......................18 3. Kit Operation Theory of Operation....................20 KitProg3: On-Board Programmer/Debugger..............26 3.2.1 Programming and Debugging using ModusToolbox Software .......26 3.2.2 USB-UART Bridge..................27...
  • Page 5 Contents 5.2.9 Push Buttons....................54 5.2.10 Cypress Quad SPI NOR Flash...............54 5.2.11 Cypress Quad SPI F-RAM ................55 5.2.12 microSD card section ..................55 5.2.13 PSoC 64 USB Section ...................56 5.2.14 Potentiometer Section..................56 PSoC 64 “Secure Boot” Wi-Fi BT Pioneer Kit Rework ..........57 5.3.1 CapSense Shield ...................57 5.3.2 ETM Trace Header..................57 5.3.3 microSD Card Detect Multiplexing ..............57...

  • Page 6: Safety And Regulatory Compliance Information

    Safety and Regulatory Compliance Information Regulatory Compliance Information Contains Transmitter Module FCC ID: VPYLB1DX and IC: 772C-LB1DX This kit is intended to use for ENGINEERING DEVELOPMENT, DEMONSTRATION, OR EVALUATION PURPOSES ONLY and is not considered by Cypress Semiconductor to be a finished end product fit for general consumer use.
  • Page 7 Safety and Regulatory Compliance Information General Safety Instructions ESD Protection ESD can damage boards and associated components. Cypress recommends that you perform procedures only at an ESD workstation. If an ESD workstation is unavailable, use appropriate ESD protection by wearing an anti-static wrist strap attached to a grounded metal object. Handling Boards CY8CKIT-064B0S2-4343W PSoC 64 “Secure Boot”...

  • Page 8: Introduction

    Introduction Thank you for your interest in the CY8CKIT-064B0S2-4343W PSoC 64 “Secure Boot” Wi-Fi BT Pioneer Kit. The PSoC 64 “Secure Boot” Wi-Fi BT Pioneer Kit enables you to evaluate and develop your applications using the PSoC 64 Line of Secured MCUs (hereafter called PSoC 64) and CYW4343W WICED Wi-Fi/BT combo device.

  • Page 9: Kit Contents

    Introduction Kit Contents The CY8CKIT-064B0S2-4343W PSoC 64 “Secure Boot” Wi-Fi BT Pioneer Kit has the following contents, as shown in Figure 1-1. PSoC 64 “Secure Boot” Wi-Fi BT Pioneer Board ■ USB Type-A to Micro-B cable ■ Four jumper wires (4 inches each) ■...

  • Page 10: Getting Started

    Introduction Getting Started This guide will help you get acquainted with the PSoC 64 “Secure Boot” Wi-Fi BT Pioneer Kit: Software Installation chapter on page 18 describes the installation of the kit software. This ■ includes the ModusToolbox software which will be used to develop, program and debug applications on to the device.
  • Page 11 Introduction 1.8 V, 2.5 V and 3.3 V operation is supported ■ Two user LEDs, an RGB LED, two user buttons, and a reset button ■ A potentiometer ■ One Mode selection button and one Status LED for KitProg3 ■ A microSD Card holder ■...
  • Page 12 Introduction Table 1-1. PSoC 64 “Secure Boot” Wi-Fi BT Pioneer Board Pinout Primary On-board Secondary On-board Connection details Function Function PSoC 64 Pins XRES Hardware Reset – – P0[2] GPIO on non-Arduino – – header IO0 (J22.1) P0[3] GPIO on non-Arduino –...
  • Page 13 Introduction Table 1-1. PSoC 64 “Secure Boot” Wi-Fi BT Pioneer Board Pinout (continued) Primary On-board Secondary On-board Connection details Function Function P6[4] PSoC 64 device – – JTAG TDO/SWD P6[5] PSoC 64 device – – JTAG TDI P6[6] PSoC 64 device –...
  • Page 14 Introduction Table 1-1. PSoC 64 “Secure Boot” Wi-Fi BT Pioneer Board Pinout (continued) Primary On-board Secondary On-board Connection details Function Function P8[7] CapSense Slider4 GPIO on non-Arduino Remove R32 to disconnect from CapSense. header IO14 (J21.7) Populate R149 to connect to GPIO on non- Arduino header.
  • Page 15 Introduction Table 1-1. PSoC 64 “Secure Boot” Wi-Fi BT Pioneer Board Pinout (continued) Primary On-board Secondary On-board Connection details Function Function P12[0] Arduino header D11 – – (J3.4) P12[1] Arduino header D12 – – (J3.5) P12[2] Arduino header D13 – –...

  • Page 16: Additional Learning Resources

    Introduction Table 1-1. PSoC 64 “Secure Boot” Wi-Fi BT Pioneer Board Pinout (continued) Primary On-board Secondary On-board Connection details Function Function BT_UART_CTS UART interface with – – Host MCU (PSoC 64 device) BT_UART_RTS UART interface with – – Host MCU (PSoC 64 device) BT_I2S_CLK I2S serial clock...

  • Page 17: Acronyms

    Introduction Table 1-2. Document Conventions for Guides Convention Usage Represents menu paths: File > Open File > Open > New Project Displays commands, menu paths, and icon names in procedures: Bold Click the File icon and then click Open. Displays an equation: Times New Roman 2 + 2 = 4 Text in gray boxes...
  • Page 18 Introduction Table 1-3. Acronyms Used in this Document (continued) Acronym Definition QSPI Quad Serial Peripheral Interface Successive Approximation Register SDHC Secure Digital Host Controller SDIO Secure Digital Input Output SMIF Serial Memory Interface Serial Peripheral Interface SRAM Serial Random Access Memory Serial Wire Debug UART Universal Asynchronous Receiver Transmitter...

  • Page 19: Software Installation

    Software Installation This chapter describes the steps to install the software tools and packages on a PC for using the CY8CKIT-064B0S2-4343W PSoC 64 “Secure Boot” Pioneer Kit. This includes ModusToolbox software on which the applications will be built and used for programming. The detailed steps for installation on macOS and Linux can be found in the “Secure Boot”...
  • Page 20 Software Installation To verify that ‘python’ and ‘pip’ by default point to python3, run:  python --version  Python 3.7.4  pip --version  pip 19.0.3 from /Library/Frameworks/Python.framework/Versions/3.7/lib/ python3.7/site-packages/pip (python 3.7) 4. Install the “Secure Boot” SDK package by running the following from a terminal/command prompt.

  • Page 21: Kit Operation

    Kit Operation This chapter introduces you to various features of the PSoC 64 “Secure Boot” Wi-Fi BT Pioneer Board, including the theory of operation and the onboard KitProg3 programming and debugging functionality, USB-UART and USB-I2C bridges. Theory of Operation The PSoC 64 “Secure Boot” Wi-Fi BT Pioneer Board is built around a PSoC 64 chip. Figure 3-1 shows the block diagram of the PSoC 64 device used on the board.
  • Page 22 Kit Operation Figure 3-2 shows the block diagram of the CY8CKIT-064B0S2-4343W Carrier Module. Figure 3-3 shows the block diagram of the CYW9-BASE-01 Pioneer Board. The CYW9-BASE-01 is the base board on which the CY8CMOD-064B0S2-4343W castellated carrier module is populated Figure 3-2. Block Diagram of CY8CMOD-064B0S2-4343W (Carrier Module) Crystals SDIO (6 I/Os) 32.768kHz & ...
  • Page 23 Kit Operation The CY8CKIT-064B0S2-4343W PSoC 64 “Secure Boot” Wi-Fi BT Pioneer Kit comes with the PSoC 64 “Secure Boot” Wi-Fi BT Pioneer Board. Figure 3-4 Figure 3-5 show the markup of the Pioneer Board. Figure 3-4. PSoC 64 “Secure Boot” Wi-Fi BT Pioneer Board - Top View 34 17 16 17 CY8CKIT-064B0S2-4343W PSoC 64 “Secure Boot”...
  • Page 24 Kit Operation Figure 3-5. PSoC 64 “Secure Boot” Wi-Fi BT Pioneer Board - Bottom View The PSoC 64 “Secure Boot” Wi-Fi BT Pioneer Board has the following peripherals: 1. Power LED (LED1): This Yellow LED indicates the status of power supplied to board. 2.
  • Page 25 Kit Operation 9. External power supply VIN connector (J5): This connector connects an external DC power supply input to the onboard regulators. 10. PSoC 64 user buttons (SW2 and SW4): These buttons can be used to provide an input to PSoC 64 device.
  • Page 26 Kit Operation 26. Cypress serial Ferroelectric RAM (CY15B104QSN, U4): The CY15B104QSN is a 4-Mbit non- volatile memory employing an advanced ferroelectric process. F-RAM is nonvolatile and per- forms reads and writes similar to a RAM. It provides reliable data retention for 151 years and is connected to the Quad SPI interface of the PSoC 64.

  • Page 27: Kitprog3: On-Board Programmer/Debugger

    Kit Operation KitProg3: On-Board Programmer/Debugger The PSoC 64 “Secure Boot” Wi-Fi BT Pioneer Board can be programmed and debugged using the onboard KitProg3. KitProg3 is a programmer/debugger with USB-UART and USB-I2C functionality. A Cypress PSoC 5LP device is used to implement KitProg3 functionality. For more details on the KitProg3 functionality, see the KitProg3 User Guide.

  • Page 28: Usb-Uart Bridge

    Kit Operation 3.2.2 USB-UART Bridge The KitProg3 on the PSoC 64 “Secure Boot” Wi-Fi BT Pioneer Board can act as a USB-UART bridge. The primary UART and flow-control lines between the PSoC 64 device and the KitProg3 are hard- wired on the board, as Figure 3-7 shows.

  • Page 29: Usb-I2C Bridge

    Kit Operation 3.2.3 USB-I2C Bridge The KitProg3 can function as a USB-I2C bridge and can communicate with the Bridge Control Panel (BCP) software which acts as an I2C master. The I2C lines on the PSoC 64 chip are hard-wired on the board to the I2C lines of the KitProg3, with onboard pull-up resistors as Figure 3-9 shows.

  • Page 30: Running Code On Psoc 64 "Secure Boot" Mcus

    Running Code on PSoC 64 “Secure Boot” MCUs The CY8CKIT-064B0S2-4343W PSoC 64 “Secure Boot” Wi-Fi BT Pioneer Kit can run code examples available on ModusToolbox software. However, prior to running any code on the PSoC 64 Line of Secured MCUs, they must first be provisioned with keys and device security policies so only signed code can be executed.
  • Page 31 Running Code on PSoC 64 “Secure Boot” MCUs For evaluation purposes, the “Secure Boot” SDK provides the following assets to easily provision your device: 1. A development cy_auth JWT token; this authorizes a development HSM keypair which is used by your PC to provision the chip.

  • Page 32: Create Modustoolbox Example Project

    Running Code on PSoC 64 “Secure Boot” MCUs Create ModusToolbox Example Project Now that an overview of the provisioning process has been provided, the steps to create an application, provision the device, and then build, program, run the application will be shown in detail. 1.
  • Page 33 Running Code on PSoC 64 “Secure Boot” MCUs 3. Select the “Secure Blinky LED FreeRTOS” example and click Create to create the application. Once creation is done, click Close to close the window and import the project into the Eclipse IDE.

  • Page 34: Provision The Device

    Running Code on PSoC 64 “Secure Boot” MCUs Provision the Device 1. Navigate to your ModusToolbox application directory folder in a command-line program: For Windows users, use the command line program “modus-shell” instead of a standard Windows command line application. Modus shell provides access to all ModusToolbox tools including “CySecureTools”...
  • Page 35 Running Code on PSoC 64 “Secure Boot” MCUs The four template policy files shown for this example are: policy_multi_CM0_CM4_smif_swap.json - Multiple application images, serial memory interface enabled, SWAP update mode. policy_multi_CM0_CM4_swap.json - Multiple application images, serial interface disabled, SWAP update mode. policy_single_CM0_CM4_smif_swap.json - Single application image, serial interface enabled, SWAP update mode.
  • Page 36 Running Code on PSoC 64 “Secure Boot” MCUs 4. Connect your CY8CKIT-064B0S2-4343W PSoC 64 “Secure Boot” Wi-Fi BT Pioneer Kit to PC using the provided USB cable through the KitProg3 USB connector. ATTENTION: Remove jumper shunt from J26 to change VCC_3V3 voltage to 2.5 V and make sure jumper shunt on J14 is placed in VCC_3V3 position (between pin 2 and 3) before plugging in the kit to the PC.
  • Page 37 Running Code on PSoC 64 “Secure Boot” MCUs cysecuretools --target cyb06xxa --policy ./policy/ policy_single_CM0_CM4_swap.json provision-device KitProg3 driver issues: There can be sporadic issue with KitProg3 and drivers can prevent the kit from being recognized or cause other failures during the provisioning flow. Please see the Chapter 7 of the KitProg3 User Guide for information on how to resolve this.

  • Page 38: Build And Program The Example Project

    Running Code on PSoC 64 “Secure Boot” MCUs Build and Program the Example Project 1. From the Eclipse IDE, click on the “Build Secure_Blinky_LED_FreeRTOS Application” link in the Quick Panel. Figure 4-8. Build Secure_Blinky_LED_FreeRTOS Application Selection Note: Ensure that you have clicked the project in the explorer otherwise the option will not be  visible.
  • Page 39 Running Code on PSoC 64 “Secure Boot” MCUs 3. The KitProg3 will still be in DAPLink mode from the provisioning step. It will need to be changed to CMSIS-DAP Bulk mode to program or debug the project. To switch to CMSIS-DAP Bulk mode, press and release the mode switch (SW3) on the kit until the status LED (LED2) is constantly on (not ramping).

  • Page 40: Additional Code Examples

    Running Code on PSoC 64 “Secure Boot” MCUs Additional Code Examples Additional code examples for PSoC 64 device can be found on the Cypress git repository https://github.com/cypresssemiconductorco Note that most PSoC 6 MCU code examples will run on PSoC 64 devices. If you wish to run other code examples on the existing kit, you can follow the same steps outlined in Section 4.2 to 4.4 with the alternate project imported into your workspace.

  • Page 41: Hardware

    Hardware Schematics Refer to the schematic files available on the webpage. Hardware Functional Description This section explains in detail the individual hardware blocks. 5.2.1 CY8CMOD-064B0S2-4343W (MOD1) CY8CMOD-064B0S2-4343W is a castellated PCB module which consists mainly of PSoC 64 chip and CYW4343W devices. The module also houses a 2.45 GHz/5.5 GHz dual-band chip antenna, RF switch for antenna diversity, Low Power Oscillator (LPO) for CYW4343W, crystal oscillators for PSoC 64, modulation and integration capacitors to support CapSense and other passive components required for the proper working of PSoC 64 and CYW4343W.
  • Page 42 Hardware PSoC 64 Signals P0_0 XRES_L P0.0 XRES P0_1 P0.1 P8_0 P0_2 P0.2 P8.0 VDDIO_WL P8_1 P0_3 P0.3 P8.1 P0_4 P8_2 P0.4 P8.2 P8_3 P0_5 P0.5 P8.3 P8_4 P8.4 P8_5 P1_0 P1.0 P8.5 P8_6 P1_1 P1.1 P8.6 P8_7 P1_2 P1.2 P8.7 P1_3 P1.3...
  • Page 43 Hardware Reset VDDD 22pF P0_1 32.768KHz 4.7K 22pF P0_0 XRES_L 0.1uF CINT, CMOD & CSH P7_1 0.47nF P12_6 CINTA P7_2 0.47nF 17.2032MHz 10pF CINTB Optional CSH P7_7 2.2nF CMOD 10pF P12_7 Supply for Type 1DX Module VBAT VBAT GND1 GND2 VDDIO_WL GND3 GND4...
  • Page 44 Hardware Decoupling Capacitors VDDIO_WL VBAT 4.7uF 2.2uF Type 1DX Module Signals RF_OUT RF_SW_IN 8.2pF WL_REG_ON WL_REG_ON BT_REG_ON WL_HOST_WAKE BT_REG_ON WL_HOST_WAKE BT_HOST_WAKE BT_HOST_WAKE SDIO_CLK BT_DEV_WAKE SDIO_CLK BT_DEV_WAKE SDIO_CMD SDIO_CMD SDIO_DATA0 BT_UART_RXD SDIO_DATA_0 BT_UART_RXD SDIO_DATA1 BT_UART_TXD SDIO_DATA_1 BT_UART_TXD SDIO_DATA2 BT_UART_CTS SDIO_DATA_2 BT_UART_CTS_N SDIO_DATA3 BT_UART_RTS SDIO_DATA_3...
  • Page 45 Hardware Antenna ANT1_ANT2 ANT1 8.2pF 1.8nH FEED 2450AD14A5500T 8.2pF 0.2pF 1.5nH 1.8nH 200V ANT2 A-1JB Carrier Module Footprint MOD1B P6_0 I2C_SCL CSX_TX P1_0 VREF P6_1 I2C_SDA VDDA MOD1A VBAT P8_1 CSB_0 P8_2 ARD_AREF CSB_1 VDDA_MCU VBAT_WL P10_0 P8_3 VBAT_WL ARD_A0 CSS_0 VDDD P10_1...

  • Page 46: Psoc 5Lp-Based Kitprog3 (U2)

    Hardware 5.2.2 PSoC 5LP-based KitProg3 (U2) An onboard PSoC 5LP (CY8C5868LTI-LP039) device is used as KitProg3 to program and debug the PSoC 64 device. The PSoC 5LP device connects to the USB port of a PC through a USB connector and to the SWD and other communication interfaces of the PSoC 64.

  • Page 47: Serial Interconnection Between Psoc 5Lp And Psoc 64 Device

    Hardware 5.2.3 Serial Interconnection between PSoC 5LP and PSoC 64 Device In addition to the use as an onboard programmer, the PSoC 5LP device functions as an interface for the USB-UART and USB-I2C bridges, as shown in Figure 5-3. The USB-Serial pins of the PSoC 5LP device are hard-wired to the I2C/UART pins of the PSoC 64 device.

  • Page 48: Serial Interconnection Between Psoc 5Lp And Cyw4343W

    Hardware 5.2.4 Serial Interconnection Between PSoC 5LP and CYW4343W The PSoC 5LP device also has a secondary UART that is connected to the BT_UART of CYW4343W (Murata Type 1DX). Note: BT_UART is also connected to PSoC 64 device on the carrier module and this is the communication interface between the PSoC 64 and the Bluetooth section of the CYW4343W.
  • Page 49 Hardware 5.2.5.1 Voltage regulators The power supply system is designed for the voltage configurations listed in Table 5-1. Some configurations achievable on this kit are outside the operating range for the device. However, it is not possible to achieve all applicable configurations by changing jumper positions but rather requires re- work of respective 0-ohm resistors.
  • Page 50 Hardware 5.2.5.2 Voltage Selection VCC_VBAT has a dedicated regulator that changes voltage by varying the feedback voltage through the resistor network at J9. VTARG and VCC_VDDIO2_IN have dedicated 3-pin voltage selection headers J14 and J16 respectively that select between VCC_3V3 or VCC_1V8 voltages. Figure 5-7 shows the schematics of the power selection circuits.
  • Page 51 Hardware 5.2.5.3 Current Measurement Headers The current of the following domains have dedicated 2-pin headers to facilitate easy current mea- surement using an ammeter across the pins. Note: If a header is not loaded by default, it is bypassed using a 0-ohm resistor parallel to it. Please make sure to remove the corresponding 0-ohm resistor (as per Figure 5-9) before measuring current...

  • Page 52: I/O Headers

    Hardware 5.2.6 I/O Headers 5.2.6.1 Arduino-compatible Headers (J1, J2, J3, J4) The board has four Arduino-compatible headers: J1, J2, J3, and J4. You can connect 3.3 V Arduino- compatible shields to develop applications based on the shield’s hardware. Note: 5-V shields are not supported and connecting a 5-V shield may permanently damage the board.

  • Page 53: Capsense Circuit

    Hardware 5.2.7 CapSense Circuit A CapSense slider and two buttons, all supporting both self-capacitance (CSD) and mutual- capacitance (CSX) sensing are connected to the PSoC 64 as Figure 5-11 shows. Three external capacitors - CMOD for CSD, CINTA and CINTB for CSX - are present on the CY8CMOD-064B0S2- 4343W.

  • Page 54: Leds

    Hardware 5.2.8 LEDs LED2 (Yellow) indicates the status of KitProg3 (See the KitProg3 User Guide for details). LED1 (Yellow) indicates the status of the power supplied to the board. The board also has two user-controllable LEDs (LED8 and LED9) and an RGB LED (LED5) connected to PSoC 64 pins for user applications.

  • Page 55: Push Buttons

    Hardware 5.2.9 Push Buttons The board has a reset button, two user-controllable buttons and a KitProg3 Mode selection button. The reset button (SW1) is connected to the XRES pin of the PSoC 64 device and is used to reset the device.

  • Page 56: Cypress Quad Spi F-Ram

    Hardware 5.2.11 Cypress Quad SPI F-RAM The PSoC 64 “Secure Boot” Wi-Fi BT Pioneer Board contains a CY15B104QSN Excelon™ F-RAM device, which can be accessed through Quad SPI interface. The F-RAM is 4-Mbit (512K × 8) and is capable of Quad SPI speed up to 108 MHz but the PSoC 64 is limited to 80 MHz. Figure 5-15.

  • Page 57: Psoc 64 Usb Section

    Hardware 5.2.13 PSoC 64 USB Section The board contains a micro-B USB connector for the PSoC 64 device. It is capable of both device and host functionality. Although the PSoC 64 does not support USB-OTG, the hardware is compliant with it. By default, the PSoC 64 device will work as a USB device; when an OTG cable (all such cables have ID pin connected to GND) is connected, it will work as a USB Host.

  • Page 58: Psoc 64 "Secure Boot" Wi-Fi Bt Pioneer Kit Rework

    Hardware PSoC 64 “Secure Boot” Wi-Fi BT Pioneer Kit Rework 5.3.1 CapSense Shield The hatched pattern around the CapSense buttons and slider are connected to ground. In case liquid tolerance is required, this pattern needs to be connected to a shield pin. This pattern can be connected to P7[4] by populating R38 and removing R56.

  • Page 59: Microsd Card Spi Multiplexing

    Hardware 5.3.4 microSD Card SPI Multiplexing The microSD card is connected by a 6-pin SDHC interface by default i.e., CLK, CMD and DAT[0:3]. There is an optional provision to connect it over a 4-pin SPI interface i.e., CLK, MOSI, MISO and SSEL.

  • Page 60: Bill Of Materials

    Hardware Bill of Materials Refer to the BOM files in the webpage. Frequently Asked Questions 1. How does CY8CKIT-064B0S2-4343W handle a voltage connection when multiple power sources are plugged in? There are three different options to power the baseboard; KitProg3 Micro-B USB connector (J6), PSoC 64 device’s Micro-B USB connector (J7), and External DC supply via VIN connector (J5).
  • Page 61 Hardware 6. Can I power the kit using external program/debug headers J11 and J12? No, this is not possible by default in this board. The target MCU is powered by on-board regulators only and hence one of the 3 main sources (J5, J6 and J7) must be present. There is a protection circuit that prevents reverse voltage from VTARG_REF to VTARG.

  • Page 62: Revision History

    Revision History Document Revision History Document Title: CY8CKIT-064B0S2-4343W PSoC 64 “Secure Boot” Wi-Fi BT Pioneer Kit Guide Document Number: 002-29286 Revision Issue Date Description of Change Number 6793005 03/24/2020 New kit guide. 6950947 08/24/2020 Updated Document Title to read as “CY8CKIT-064B0S2-4343W PSoC 64 Secure Boot Wi-Fi BT Pioneer Kit Guide”.
  • Page 63 Revision History Document Revision History (continued) Document Title: CY8CKIT-064B0S2-4343W PSoC 64 “Secure Boot” Wi-Fi BT Pioneer Kit Guide Document Number: 002-29286 Revision Issue Date Description of Change Number *A (cont.) 6950947 08/24/2020 Updated Software Installation chapter on page Updated “Install Software” on page Updated description.
  • Page 64 Revision History Document Revision History (continued) Document Title: CY8CKIT-064B0S2-4343W PSoC 64 “Secure Boot” Wi-Fi BT Pioneer Kit Guide Document Number: 002-29286 Revision Issue Date Description of Change Number *A (cont.) 6950947 08/24/2020 Updated Hardware chapter on page Updated “Hardware Functional Description” on page Updated “CY8CMOD-064B0S2-4343W (MOD1)”...
  • Page 65 Revision History Document Revision History (continued) Document Title: CY8CKIT-064B0S2-4343W PSoC 64 “Secure Boot” Wi-Fi BT Pioneer Kit Guide Document Number: 002-29286 Revision Issue Date Description of Change Number 6989049 10/10/2020 Updated Software Installation chapter on page Updated “Install Software” on page Updated description.

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