Control Techniques UD53 User Manual page 21

Resolver SIN and
COS inputs
48
49
Decoder
50
51
16.09
Resolver
phase offset
Figure 6 Logic diagram for the UD53
UD53 User Guide
Issue code: 53nu3
Resolver Resolver
RPM position
16.02 16.03
1
[16.07]
2
16.07
Simulated-encoder
output scaling
16.05
Resolver
phasing test
Simulated-encoder
outputs
40
41
16.08
43
Simulated-
44
encoder F/D
output enable
46
47
16.12
Simulated-
encoder Z
marker-pulse
outputs
synchronization
disable
Synchronization
control logic
Simulated-encoder Z
marker-pulse outputs
16.13
synchronization
inactive indicator
17